diff options
| author | Huacai Chen <chenhc@lemote.com> | 2014-11-04 09:15:31 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 09:45:02 +0300 |
| commit | e292ccde216e571faad475e4331c188f22a28182 (patch) | |
| tree | 18bd2792fa52b3cd3f1aa2bc305262b75f80d8f8 /arch/mips/loongson/loongson-3/irq.c | |
| parent | 89467e73d3881a470ce4ffdcba1d5a5ed618379a (diff) | |
| download | linux-e292ccde216e571faad475e4331c188f22a28182.tar.xz | |
MIPS: Loongson-3: Add RS780/SBX00 HPET support
CPUFreq driver need external timer, so add hpet at first.
In Loongson 3, only Core-0 can receive external interrupt. As a result,
timekeeping cannot absolutely use HPET timer. We use a hybrid solution:
Core-0 use HPET as its clock event device, but other cores still use
MIPS; clock source is global and doesn't need interrupt, so use HPET.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Hongliang Tao <taohl@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/8329/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/loongson-3/irq.c')
| -rw-r--r-- | arch/mips/loongson/loongson-3/irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/loongson/loongson-3/irq.c b/arch/mips/loongson/loongson-3/irq.c index 5813d941f9fc..21221edda7a9 100644 --- a/arch/mips/loongson/loongson-3/irq.c +++ b/arch/mips/loongson/loongson-3/irq.c @@ -9,7 +9,7 @@ #include "smp.h" -unsigned int ht_irq[] = {1, 3, 4, 5, 6, 7, 8, 12, 14, 15}; +unsigned int ht_irq[] = {0, 1, 3, 4, 5, 6, 7, 8, 12, 14, 15}; static void ht_irqdispatch(void) { |