diff options
| author | James Hogan <james.hogan@imgtec.com> | 2016-07-04 21:35:13 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-07-05 17:09:17 +0300 |
| commit | 5cc4aafced42d7ece3d20650bf6ca2a165e6fca3 (patch) | |
| tree | 7ab1bb01e023111e7629da7367214de58727fdfe /arch/mips/kvm/dyntrans.c | |
| parent | 2e0badfaac234ef3ed6b5397ff208d218cd450fb (diff) | |
| download | linux-5cc4aafced42d7ece3d20650bf6ca2a165e6fca3.tar.xz | |
MIPS: KVM: Recognise r6 CACHE encoding
Recognise the new MIPSr6 CACHE instruction encoding rather than the
pre-r6 one when an r6 kernel is being built. A SPECIAL3 opcode is used
and the immediate field is reduced to 9 bits wide since MIPSr6.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim KrÄmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/mips/kvm/dyntrans.c')
| -rw-r--r-- | arch/mips/kvm/dyntrans.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/kvm/dyntrans.c b/arch/mips/kvm/dyntrans.c index 8a1833b9eb38..91ebd2b6034f 100644 --- a/arch/mips/kvm/dyntrans.c +++ b/arch/mips/kvm/dyntrans.c @@ -72,7 +72,10 @@ int kvm_mips_trans_cache_va(union mips_instruction inst, u32 *opc, synci_inst.i_format.opcode = bcond_op; synci_inst.i_format.rs = inst.i_format.rs; synci_inst.i_format.rt = synci_op; - synci_inst.i_format.simmediate = inst.i_format.simmediate; + if (cpu_has_mips_r6) + synci_inst.i_format.simmediate = inst.spec3_format.simmediate; + else + synci_inst.i_format.simmediate = inst.i_format.simmediate; return kvm_mips_trans_replace(vcpu, opc, synci_inst); } |