diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-04-03 20:56:36 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-04-19 06:14:21 +0400 |
| commit | e4ac58afdfac792c0583af30dbd9eae53e24c78b (patch) | |
| tree | 7517bef2c515fc630e4d3d238867b91cde96f558 /arch/mips/ite-boards/generic/int-handler.S | |
| parent | d35d473c25d43d7db3e5e18b66d558d2a631cca8 (diff) | |
| download | linux-e4ac58afdfac792c0583af30dbd9eae53e24c78b.tar.xz | |
[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had. And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.
The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ite-boards/generic/int-handler.S')
| -rw-r--r-- | arch/mips/ite-boards/generic/int-handler.S | 63 |
1 files changed, 0 insertions, 63 deletions
diff --git a/arch/mips/ite-boards/generic/int-handler.S b/arch/mips/ite-boards/generic/int-handler.S deleted file mode 100644 index d190d8add9cb..000000000000 --- a/arch/mips/ite-boards/generic/int-handler.S +++ /dev/null @@ -1,63 +0,0 @@ -#include <asm/asm.h> -#include <asm/mipsregs.h> -#include <asm/regdef.h> -#include <asm/stackframe.h> - - .text - .set macro - .set noat - .align 5 - -NESTED(it8172_IRQ, PT_SIZE, sp) - SAVE_ALL - CLI # Important: mark KERNEL mode ! - - /* We're working with 'reorder' set at this point. */ - /* - * Get pending interrupts - */ - - mfc0 t0,CP0_CAUSE # get pending interrupts - mfc0 t1,CP0_STATUS # get enabled interrupts - and t0,t1 # isolate allowed ones - - andi t0,0xff00 # isolate pending bits - beqz t0, 3f # spurious interrupt - - andi a0, t0, CAUSEF_IP7 - beq a0, zero, 1f - - li a0, 127 # MIPS_CPU_TIMER_IRQ = (NR_IRQS-1) - move a1, sp - jal ll_timer_interrupt - j ret_from_irq - nop - -1: - andi a0, t0, CAUSEF_IP2 # the only int we expect at this time - beq a0, zero, 3f - move a0,sp - jal it8172_hw0_irqdispatch - - mfc0 t0,CP0_STATUS # disable interrupts - ori t0,1 - xori t0,1 - mtc0 t0,CP0_STATUS - nop - nop - nop - - la a1, ret_from_irq - jr a1 - nop - -3: - move a0, sp - jal mips_spurious_interrupt - nop - la a1, ret_from_irq - jr a1 - nop - -END(it8172_IRQ) - |