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| author | Jayachandran C <jchandra@broadcom.com> | 2013-06-10 10:30:04 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-06-13 19:46:41 +0400 |
| commit | 5649d37c2b23ad6545709c976b9abbfa8d5f4e11 (patch) | |
| tree | a9fda320023769a6f7991487fb6ff1604a8560c2 /arch/mips/include | |
| parent | 64f6ebe63914835ad5cd5bc4c490f3deaeac2511 (diff) | |
| download | linux-5649d37c2b23ad6545709c976b9abbfa8d5f4e11.tar.xz | |
MIPS: Netlogic: COP2 save/restore code
Add COP2 register state structure and functions for Netlogic XLP. The
RX and TX buffers and status registers are to be saved. Since the
registers are 64-bit, do the implementation in inline assembly which
works on both 32-bit and 64-bit kernels.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Cc: ddaney.cavm@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/5413/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/cop2.h | 10 | ||||
| -rw-r--r-- | arch/mips/include/asm/processor.h | 13 |
2 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h index b17f38ee1ed4..c1516cc0285f 100644 --- a/arch/mips/include/asm/cop2.h +++ b/arch/mips/include/asm/cop2.h @@ -22,6 +22,16 @@ extern void octeon_cop2_restore(struct octeon_cop2_state *); #define cop2_present 1 #define cop2_lazy_restore 1 +#elif defined(CONFIG_CPU_XLP) + +extern void nlm_cop2_save(struct nlm_cop2_state *); +extern void nlm_cop2_restore(struct nlm_cop2_state *); +#define cop2_save(r) nlm_cop2_save(r) +#define cop2_restore(r) nlm_cop2_restore(r) + +#define cop2_present 1 +#define cop2_lazy_restore 0 + #else #define cop2_present 0 diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index 7c637a461ced..016dc4bffc80 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -190,6 +190,16 @@ struct octeon_cvmseg_state { [cpu_dcache_line_size() / sizeof(unsigned long)]; }; +#elif defined(CONFIG_CPU_XLP) +struct nlm_cop2_state { + u64 rx[4]; + u64 tx[4]; + u32 tx_msg_status; + u32 rx_msg_status; +}; + +#define COP2_INIT \ + .cp2 = {{0}, {0}, 0, 0}, #else #define COP2_INIT #endif @@ -237,6 +247,9 @@ struct thread_struct { struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128))); struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128))); #endif +#ifdef CONFIG_CPU_XLP + struct nlm_cop2_state cp2; +#endif struct mips_abi *abi; }; |