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| author | Jakub Kicinski <kuba@kernel.org> | 2021-10-08 01:24:06 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2021-10-08 01:24:06 +0300 |
| commit | 9fe1155233c8290ca6e206053e531ef87f9026ea (patch) | |
| tree | ef0d45b2562e01beb8ce4cb4cd016155b4e32a65 /arch/mips/include | |
| parent | c514fbb6231483b05c97eb22587188d4c453b28e (diff) | |
| parent | 1da38549dd64c7f5dd22427f12dfa8db3d8a722b (diff) | |
| download | linux-9fe1155233c8290ca6e206053e531ef87f9026ea.tar.xz | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
No conflicts.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mips-cps.h | 23 |
1 files changed, 1 insertions, 22 deletions
diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h index 35fb8ee6dd33..fd43d876892e 100644 --- a/arch/mips/include/asm/mips-cps.h +++ b/arch/mips/include/asm/mips-cps.h @@ -10,8 +10,6 @@ #include <linux/io.h> #include <linux/types.h> -#include <asm/mips-boards/launch.h> - extern unsigned long __cps_access_bad_size(void) __compiletime_error("Bad size for CPS accessor"); @@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster) */ static inline unsigned int mips_cps_numcores(unsigned int cluster) { - unsigned int ncores; - if (!mips_cm_present()) return 0; /* Add one before masking to handle 0xff indicating no cores */ - ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES; - - if (IS_ENABLED(CONFIG_SOC_MT7621)) { - struct cpulaunch *launch; - - /* - * Ralink MT7621S SoC is single core, but the GCR_CONFIG method - * always reports 2 cores. Check the second core's LAUNCH_FREADY - * flag to detect if the second core is missing. This method - * only works before the core has been started. - */ - launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); - launch += 2; /* MT7621 has 2 VPEs per core */ - if (!(launch->flags & LAUNCH_FREADY)) - ncores = 1; - } - - return ncores; + return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES; } /** |