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authorMaciej W. Rozycki <macro@linux-mips.org>2015-04-04 01:23:41 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-04-08 02:08:30 +0300
commit124f43d30ffe84a9ffd1fe448022467a2bfb70bc (patch)
tree190a014e04e655d48a551f97467ddcbcc395f7d8 /arch/mips/include/asm
parentfab43ef4c8b825d8cbe05e8f70c9138de1951980 (diff)
downloadlinux-124f43d30ffe84a9ffd1fe448022467a2bfb70bc.tar.xz
MIPS: mipsregs.h: Remove broken comments
Remove a duplicate FPU Status Register reference that has been there since forever and a mistakenly copied and pasted R4xx0 manual reference. [ralf@linux-mips.org: Fix conflict.] Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9666/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/mipsregs.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 73447951204d..c7554f057366 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -120,10 +120,6 @@
/*
* FPU Status Register Values
*/
-/*
- * Status Register Values
- */
-
#define FPU_CSR_FLUSH 0x01000000 /* flush denormalised results to 0 */
#define FPU_CSR_COND 0x00800000 /* $fcc0 */
#define FPU_CSR_COND0 0x00800000 /* $fcc0 */
@@ -425,8 +421,6 @@
/*
* Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
- *
- * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
*/
#define INTCTLB_IPFDC 23
#define INTCTLF_IPFDC (_ULCAST_(7) << INTCTLB_IPFDC)