summaryrefslogtreecommitdiff
path: root/arch/mips/include/asm
diff options
context:
space:
mode:
authorDavid Daney <ddaney@caviumnetworks.com>2010-02-11 02:12:48 +0300
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 14:53:26 +0300
commit6f329468f3086e9d8f3832930fdb09ab3769176b (patch)
treed77b274399cf101fba59b0de01fd9491b4e28fee /arch/mips/include/asm
parent6dd9344cfc41bcc60a01cdc828cb278be7a10e01 (diff)
downloadlinux-6f329468f3086e9d8f3832930fdb09ab3769176b.tar.xz
MIPS: Give Octeon+ CPUs their own cputype.
This allows us to treat them differently at runtime. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/951/ Patchwork: http://patchwork.linux-mips.org/patch/987/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index cf373a95fe4a..a5acda416946 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -224,7 +224,7 @@ enum cpu_type_enum {
* MIPS64 class processors
*/
CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
- CPU_CAVIUM_OCTEON,
+ CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
CPU_LAST
};