diff options
author | David Daney <david.daney@cavium.com> | 2016-02-02 04:46:54 +0300 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 15:01:39 +0300 |
commit | 7d52ab163c75bb830185f7ea12bae1db87f12b56 (patch) | |
tree | 4c17ceae61fbbd110059570465b1e13d29e010fa /arch/mips/include/asm | |
parent | 58546e3b735cc9f695bba1559be76a68b072761f (diff) | |
download | linux-7d52ab163c75bb830185f7ea12bae1db87f12b56.tar.xz |
MIPS: OCTEON: Extend number of supported CPUs past 32
To support more than 48 CPUs, the bootinfo structure grows a new
coremask structure. Add the definition of the structure and add it to
struct cvmx_bootinfo. In prom_init(), copy the new coremask data into
the sysinfo structure, and use it in smp_setup().
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r-- | arch/mips/include/asm/octeon/cvmx-bootinfo.h | 14 | ||||
-rw-r--r-- | arch/mips/include/asm/octeon/cvmx-coremask.h | 89 | ||||
-rw-r--r-- | arch/mips/include/asm/octeon/cvmx-sysinfo.h | 7 |
3 files changed, 106 insertions, 4 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-bootinfo.h b/arch/mips/include/asm/octeon/cvmx-bootinfo.h index d92cf59bdae6..c455d34f5a4f 100644 --- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h +++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h @@ -32,6 +32,8 @@ #ifndef __CVMX_BOOTINFO_H__ #define __CVMX_BOOTINFO_H__ +#include "cvmx-coremask.h" + /* * Current major and minor versions of the CVMX bootinfo block that is * passed from the bootloader to the application. This is versioned @@ -39,7 +41,7 @@ * versions. */ #define CVMX_BOOTINFO_MAJ_VER 1 -#define CVMX_BOOTINFO_MIN_VER 3 +#define CVMX_BOOTINFO_MIN_VER 4 #if (CVMX_BOOTINFO_MAJ_VER == 1) #define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20 @@ -124,6 +126,13 @@ struct cvmx_bootinfo { */ uint64_t fdt_addr; #endif +#if (CVMX_BOOTINFO_MIN_VER >= 4) + /* + * Coremask used for processors with more than 32 cores + * or with OCI. This replaces core_mask. + */ + struct cvmx_coremask ext_core_mask; +#endif #else /* __BIG_ENDIAN */ /* * Little-Endian: When the CPU mode is switched to @@ -177,6 +186,9 @@ struct cvmx_bootinfo { #if (CVMX_BOOTINFO_MIN_VER >= 3) uint64_t fdt_addr; #endif +#if (CVMX_BOOTINFO_MIN_VER >= 4) + struct cvmx_coremask ext_core_mask; +#endif #endif }; diff --git a/arch/mips/include/asm/octeon/cvmx-coremask.h b/arch/mips/include/asm/octeon/cvmx-coremask.h new file mode 100644 index 000000000000..097dc096db84 --- /dev/null +++ b/arch/mips/include/asm/octeon/cvmx-coremask.h @@ -0,0 +1,89 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (c) 2016 Cavium Inc. (support@cavium.com). + * + */ + +/* + * Module to support operations on bitmap of cores. Coremask can be used to + * select a specific core, a group of cores, or all available cores, for + * initialization and differentiation of roles within a single shared binary + * executable image. + * + * The core numbers used in this file are the same value as what is found in + * the COP0_EBASE register and the rdhwr 0 instruction. + * + * For the CN78XX and other multi-node environments the core numbers are not + * contiguous. The core numbers for the CN78XX are as follows: + * + * Node 0: Cores 0 - 47 + * Node 1: Cores 128 - 175 + * Node 2: Cores 256 - 303 + * Node 3: Cores 384 - 431 + * + */ + +#ifndef __CVMX_COREMASK_H__ +#define __CVMX_COREMASK_H__ + +#define CVMX_MIPS_MAX_CORES 1024 +/* bits per holder */ +#define CVMX_COREMASK_ELTSZ 64 + +/* cvmx_coremask_t's size in u64 */ +#define CVMX_COREMASK_BMPSZ (CVMX_MIPS_MAX_CORES / CVMX_COREMASK_ELTSZ) + + +/* cvmx_coremask_t */ +struct cvmx_coremask { + u64 coremask_bitmap[CVMX_COREMASK_BMPSZ]; +}; + +/* + * Is ``core'' set in the coremask? + */ +static inline bool cvmx_coremask_is_core_set(const struct cvmx_coremask *pcm, + int core) +{ + int n, i; + + n = core % CVMX_COREMASK_ELTSZ; + i = core / CVMX_COREMASK_ELTSZ; + + return (pcm->coremask_bitmap[i] & ((u64)1 << n)) != 0; +} + +/* + * Make a copy of a coremask + */ +static inline void cvmx_coremask_copy(struct cvmx_coremask *dest, + const struct cvmx_coremask *src) +{ + memcpy(dest, src, sizeof(*dest)); +} + +/* + * Set the lower 64-bit of the coremask. + */ +static inline void cvmx_coremask_set64(struct cvmx_coremask *pcm, + uint64_t coremask_64) +{ + pcm->coremask_bitmap[0] = coremask_64; +} + +/* + * Clear ``core'' from the coremask. + */ +static inline void cvmx_coremask_clear_core(struct cvmx_coremask *pcm, int core) +{ + int n, i; + + n = core % CVMX_COREMASK_ELTSZ; + i = core / CVMX_COREMASK_ELTSZ; + pcm->coremask_bitmap[i] &= ~(1ull << n); +} + +#endif /* __CVMX_COREMASK_H__ */ diff --git a/arch/mips/include/asm/octeon/cvmx-sysinfo.h b/arch/mips/include/asm/octeon/cvmx-sysinfo.h index 78cd64ad79c7..c6c3ee39c69d 100644 --- a/arch/mips/include/asm/octeon/cvmx-sysinfo.h +++ b/arch/mips/include/asm/octeon/cvmx-sysinfo.h @@ -32,6 +32,8 @@ #ifndef __CVMX_SYSINFO_H__ #define __CVMX_SYSINFO_H__ +#include "cvmx-coremask.h" + #define OCTEON_SERIAL_LEN 20 /** * Structure describing application specific information. @@ -50,8 +52,7 @@ struct cvmx_sysinfo { uint64_t system_dram_size; /* ptr to memory descriptor block */ - void *phy_mem_desc_ptr; - + uint64_t phy_mem_desc_addr; /* Application image specific variables */ /* stack top address (virtual) */ @@ -63,7 +64,7 @@ struct cvmx_sysinfo { /* heap size in bytes */ uint32_t heap_size; /* coremask defining cores running application */ - uint32_t core_mask; + struct cvmx_coremask core_mask; /* Deprecated, use cvmx_coremask_first_core() to select init core */ uint32_t init_core; |