Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:

 - Improvements to the tlb_dump code
 - KVM fixes
 - Add support for appended DTB
 - Minor improvements to the R12000 support
 - Minor improvements to the R12000 support
 - Various platform improvments for BCM47xx
 - The usual pile of minor cleanups
 - A number of BPF fixes and improvments
 - Some improvments to the support for R3000 and DECstations
 - Some improvments to the ATH79 platform support
 - A major patchset for the JZ4740 SOC adding support for the CI20 platform
 - Add support for the Pistachio SOC
 - Minor BMIPS/BCM63xx platform support improvments.
 - Avoid "SYNC 0" as memory barrier when unlocking spinlocks
 - Add support for the XWR-1750 board.
 - Paul's __cpuinit/__cpuinitdata cleanups.
 - New Malta CPU board support large memory so enable ZONE_DMA32.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
  MIPS: spinlock: Adjust arch_spin_lock back-off time
  MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
  MIPS: BCM47xx: Simplify handling SPROM revisions
  MIPS: Cobalt Don't use module_init in non-modular MTD registration.
  MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
  MIPS: use for_each_sg()
  MIPS: BCM47xx: Don't select BCMA_HOST_PCI
  MIPS: BCM47xx: Add helper variable for storing NVRAM length
  MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
  MIPS: Replace smp_mb with release barrier function in unlocks.
  MIPS: i8259: DT support
  MIPS: Malta: Basic DT plumbing
  MIPS: include errno.h for ENODEV in mips-cm.h
  MIPS: Define GCR_GIC_STATUS register fields
  MIPS: BPF: Introduce BPF ASM helpers
  MIPS: BPF: Use BPF register names to describe the ABI
  MIPS: BPF: Move register definition to the BPF header
  MIPS: net: BPF: Replace RSIZE with SZREG
  MIPS: BPF: Free up some callee-saved registers
  MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
  ...

1 files changed, 112 insertions, 0 deletions

diff --git a/arch/mips/include/asm/xtalk/xwidget.h b/arch/mips/include/asm/xtalk/xwidget.h
index 32e4e884f9b9..24f121da6a1d 100644
--- a/arch/mips/include/asm/xtalk/xwidget.h
+++ b/arch/mips/include/asm/xtalk/xwidget.h
@@ -84,6 +84,118 @@
 #define WIDGET_LLP_MAXBURST		0x000003ff
 #define WIDGET_LLP_MAXBURST_SHFT	0
 
+/* Xtalk Widget Device Mfgr Nums */
+#define WIDGET_XBOW_MFGR_NUM	0x0      /* IP30 XBow Chip */
+#define WIDGET_XXBOW_MFGR_NUM	0x0      /* IP35 Xbow + XBridge Chip */
+#define WIDGET_ODYS_MFGR_NUM	0x023    /* Odyssey / VPro GFX */
+#define WIDGET_TPU_MFGR_NUM	0x024    /* Tensor Processor Unit */
+#define WIDGET_XBRDG_MFGR_NUM	0x024    /* IP35 XBridge Chip */
+#define WIDGET_HEART_MFGR_NUM	0x036    /* IP30 HEART Chip */
+#define WIDGET_BRIDG_MFGR_NUM	0x036    /* PCI Bridge */
+#define WIDGET_HUB_MFGR_NUM	0x036    /* IP27 Hub Chip */
+#define WIDGET_BDRCK_MFGR_NUM	0x036    /* IP35 Bedrock Chip */
+#define WIDGET_IMPCT_MFGR_NUM	0x2aa    /* HQ4 / Impact GFX */
+#define WIDGET_KONA_MFGR_NUM	0x2aa    /* InfiniteReality3 / Kona GFX */
+#define WIDGET_NULL_MFGR_NUM	-1       /* NULL */
+
+/* Xtalk Widget Device Part Nums */
+#define WIDGET_XBOW_PART_NUM	0x0000
+#define WIDGET_HEART_PART_NUM	0xc001
+#define WIDGET_BRIDG_PART_NUM	0xc002
+#define WIDGET_IMPCT_PART_NUM	0xc003
+#define WIDGET_ODYS_PART_NUM	0xc013
+#define WIDGET_HUB_PART_NUM	0xc101
+#define WIDGET_KONA_PART_NUM	0xc102
+#define WIDGET_BDRCK_PART_NUM	0xc110
+#define WIDGET_TPU_PART_NUM	0xc202
+#define WIDGET_XXBOW_PART_NUM	0xd000
+#define WIDGET_XBRDG_PART_NUM	0xd002
+#define WIDGET_NULL_PART_NUM	-1
+
+/* For Xtalk Widget identification */
+struct widget_ident {
+	u32 mfgr;
+	u32 part;
+	char *name;
+	char *revs[16];
+};
+
+/* Known Xtalk Widgets */
+static const struct widget_ident __initconst widget_idents[] = {
+	{
+		WIDGET_XBOW_MFGR_NUM,
+		WIDGET_XBOW_PART_NUM,
+		"xbow",
+		{NULL, "1.0", "1.1", "1.2", "1.3", "2.0", NULL},
+	},
+	{
+		WIDGET_HEART_MFGR_NUM,
+		WIDGET_HEART_PART_NUM,
+		"heart",
+		{NULL, "A", "B", "C", "D", "E", "F", NULL},
+	},
+	{
+		WIDGET_BRIDG_MFGR_NUM,
+		WIDGET_BRIDG_PART_NUM,
+		"bridge",
+		{NULL, "A", "B", "C", "D", NULL},
+	},
+	{
+		WIDGET_IMPCT_MFGR_NUM,
+		WIDGET_IMPCT_PART_NUM,
+		"impact",
+		{NULL, "A", "B", NULL},
+	},
+	{
+		WIDGET_ODYS_MFGR_NUM,
+		WIDGET_ODYS_PART_NUM,
+		"odyssey",
+		{NULL, "A", "B", NULL},
+	},
+	{
+		WIDGET_HUB_MFGR_NUM,
+		WIDGET_HUB_PART_NUM,
+		"hub",
+		{NULL, "1.0", "2.0", "2.1", "2.2", "2.3", "2.4", NULL},
+	},
+	{
+		WIDGET_KONA_MFGR_NUM,
+		WIDGET_KONA_PART_NUM,
+		"kona",
+		{NULL},
+	},
+	{
+		WIDGET_BDRCK_MFGR_NUM,
+		WIDGET_BDRCK_PART_NUM,
+		"bedrock",
+		{NULL, "1.0", "1.1", NULL},
+	},
+	{
+		WIDGET_TPU_MFGR_NUM,
+		WIDGET_TPU_PART_NUM,
+		"tpu",
+		{"0", NULL},
+	},
+	{
+		WIDGET_XXBOW_MFGR_NUM,
+		WIDGET_XXBOW_PART_NUM,
+		"xxbow",
+		{NULL, "1.0", "2.0", NULL},
+	},
+	{
+		WIDGET_XBRDG_MFGR_NUM,
+		WIDGET_XBRDG_PART_NUM,
+		"xbridge",
+		{NULL, "A", "B", NULL},
+	},
+	{
+		WIDGET_NULL_MFGR_NUM,
+		WIDGET_NULL_PART_NUM,
+		NULL,
+		{NULL},
+	}
+};
+
 /*
  * according to the crosstalk spec, only 32-bits access to the widget
  * configuration registers is allowed.	some widgets may allow 64-bits