diff options
author | Wu Zhangjin <wuzhangjin@gmail.com> | 2009-11-06 13:45:05 +0300 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-12-17 04:57:10 +0300 |
commit | 6f7a251a259e5bf58a9ff334bdcfa3e42b6cb7a3 (patch) | |
tree | f5b65babda54c52073819629cc0f1047b5d1b413 /arch/mips/include/asm/mach-loongson | |
parent | 937893cf5be53203eabc6f4db29f86b1fdeea203 (diff) | |
download | linux-6f7a251a259e5bf58a9ff334bdcfa3e42b6cb7a3.tar.xz |
MIPS: Loongson: Add basic Loongson 2F support
Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.
The main differences between Loongson 2E and Loongson 2F include:
1. Loongson 2F has an extra address window configuration module, which
is used to map CPU address space to DDR or PCI address space, or map
the PCI-DMA address space to DDR or LIO address space.
2. Loongson 2F supports 8 levels of software configurable CPu frequency
which can be configured in the LOONGSON_CHIPCFG0 register. The coming
cpufreq and standby support are based on this feature.
Loongson.h abstracts the modules and corresponding methods are abstracted.
Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-loongson')
-rw-r--r-- | arch/mips/include/asm/mach-loongson/dma-coherence.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/loongson.h | 84 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/mem.h | 27 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/pci.h | 28 |
4 files changed, 132 insertions, 11 deletions
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h index 71a6851ba833..981c75f91a7d 100644 --- a/arch/mips/include/asm/mach-loongson/dma-coherence.h +++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h @@ -28,7 +28,11 @@ static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, static inline unsigned long plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr) { +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) + return (dma_addr > 0x8fffffff) ? dma_addr : (dma_addr & 0x0fffffff); +#else return dma_addr & 0x7fffffff; +#endif } static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index 722db9e811e5..62171f240c7b 100644 --- a/arch/mips/include/asm/mach-loongson/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology + * Copyright (C) 2009 Lemote, Inc. * Author: Wu Zhangjin <wuzj@lemote.com> * * This program is free software; you can redistribute it and/or modify it @@ -219,4 +219,86 @@ extern void mach_irq_dispatch(unsigned int pending); #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) +/* Chip Config */ +#ifdef CONFIG_CPU_LOONGSON2F +#define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80) +#endif + +/* + * address windows configuration module + * + * loongson2e do not have this module + */ +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) + +/* address window config module base address */ +#define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul +#define LOONGSON_ADDRWINCFG_SIZE 0x180 + +extern unsigned long _loongson_addrwincfg_base; +#define LOONGSON_ADDRWINCFG(offset) \ + (*(volatile u64 *)(_loongson_addrwincfg_base + (offset))) + +#define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00) +#define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08) +#define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10) +#define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18) + +#define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20) +#define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28) +#define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30) +#define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38) + +#define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40) +#define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48) +#define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50) +#define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58) + +#define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60) +#define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68) +#define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70) +#define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78) + +#define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80) +#define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88) +#define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90) +#define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98) + +#define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0) +#define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8) +#define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0) +#define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8) + +#define ADDRWIN_WIN0 0 +#define ADDRWIN_WIN1 1 +#define ADDRWIN_WIN2 2 +#define ADDRWIN_WIN3 3 + +#define ADDRWIN_MAP_DST_DDR 0 +#define ADDRWIN_MAP_DST_PCI 1 +#define ADDRWIN_MAP_DST_LIO 1 + +/* + * s: CPU, PCIDMA + * d: DDR, PCI, LIO + * win: 0, 1, 2, 3 + * src: map source + * dst: map destination + * size: ~mask + 1 + */ +#define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\ + s##_WIN##w##_BASE = (src); \ + s##_WIN##w##_MMAP = (src) | ADDRWIN_MAP_DST_##d; \ + s##_WIN##w##_MASK = ~(size-1); \ +} while (0) + +#define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \ + LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size) +#define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \ + LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size) +#define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \ + LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size) + +#endif /* ! CONFIG_CPU_LOONGSON2F && CONFIG_64BIT */ + #endif /* __ASM_MACH_LOONGSON_LOONGSON_H */ diff --git a/arch/mips/include/asm/mach-loongson/mem.h b/arch/mips/include/asm/mach-loongson/mem.h index bd7b3cba7e35..e9960f341b96 100644 --- a/arch/mips/include/asm/mach-loongson/mem.h +++ b/arch/mips/include/asm/mach-loongson/mem.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology + * Copyright (C) 2009 Lemote, Inc. * Author: Wu Zhangjin <wuzj@lemote.com> * * This program is free software; you can redistribute it and/or modify it @@ -12,19 +12,30 @@ #define __ASM_MACH_LOONGSON_MEM_H /* - * On Lemote Loongson 2e + * high memory space * - * the high memory space starts from 512M. - * the peripheral registers reside between 0x1000:0000 and 0x2000:0000. + * in loongson2e, starts from 512M + * in loongson2f, starts from 2G 256M */ +#ifdef CONFIG_CPU_LOONGSON2E +#define LOONGSON_HIGHMEM_START 0x20000000 +#else +#define LOONGSON_HIGHMEM_START 0x90000000 +#endif -#ifdef CONFIG_LEMOTE_FULOONG2E - -#define LOONGSON_HIGHMEM_START 0x20000000 +/* + * the peripheral registers(MMIO): + * + * On the Lemote Loongson 2e system, reside between 0x1000:0000 and 0x2000:0000. + * On the Lemote Loongson 2f system, reside between 0x1000:0000 and 0x8000:0000. + */ #define LOONGSON_MMIO_MEM_START 0x10000000 -#define LOONGSON_MMIO_MEM_END 0x20000000 +#ifdef CONFIG_CPU_LOONGSON2E +#define LOONGSON_MMIO_MEM_END 0x20000000 +#else +#define LOONGSON_MMIO_MEM_END 0x80000000 #endif #endif /* __ASM_MACH_LOONGSON_MEM_H */ diff --git a/arch/mips/include/asm/mach-loongson/pci.h b/arch/mips/include/asm/mach-loongson/pci.h index 576487c00470..31ba90891ec0 100644 --- a/arch/mips/include/asm/mach-loongson/pci.h +++ b/arch/mips/include/asm/mach-loongson/pci.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> + * Copyright (c) 2009 Wu Zhangjin <wuzj@lemote.com> * * This program is free software; you can redistribute it * and/or modify it under the terms of the GNU General @@ -24,7 +25,30 @@ extern struct pci_ops loongson_pci_ops; -#ifdef CONFIG_LEMOTE_FULOONG2E +/* this is an offset from mips_io_port_base */ +#define LOONGSON_PCI_IO_START 0x00004000UL + +#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) + +/* + * we use address window2 to map cpu address space to pci space + * window2: cpu [1G, 2G] -> pci [1G, 2G] + * why not use window 0 & 1? because they are used by cpu when booting. + * window0: cpu [0, 256M] -> ddr [0, 256M] + * window1: cpu [256M, 512M] -> pci [256M, 512M] + */ + +/* the smallest LOONGSON_CPU_MEM_SRC can be 512M */ +#define LOONGSON_CPU_MEM_SRC 0x40000000ul /* 1G */ +#define LOONGSON_PCI_MEM_DST LOONGSON_CPU_MEM_SRC + +#define LOONGSON_PCI_MEM_START LOONGSON_PCI_MEM_DST +#define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */ + +#define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \ + LOONGSON_PCI_MEM_START + 1) + +#else /* loongson2f/32bit & loongson2e */ /* this pci memory space is mapped by pcimap in pci.c */ #define LOONGSON_PCI_MEM_START LOONGSON_PCILO1_BASE @@ -32,6 +56,6 @@ extern struct pci_ops loongson_pci_ops; /* this is an offset from mips_io_port_base */ #define LOONGSON_PCI_IO_START 0x00004000UL -#endif +#endif /* !(defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT))*/ #endif /* !__ASM_MACH_LOONGSON_PCI_H_ */ |