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authorLinus Torvalds <torvalds@linux-foundation.org>2012-08-02 03:47:15 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-08-02 03:47:15 +0400
commit1a9b4993b70fb1884716902774dc9025b457760d (patch)
tree83a3fa7011878ab4b7bef6857d4b481038a1e67e /arch/mips/include/asm/mach-loongson/loongson.h
parent1871e845e564c4e17f561ec4e5e4bb6bb8578685 (diff)
parent95cf1468f712df516cc471adcd1c861df4e3d371 (diff)
downloadlinux-1a9b4993b70fb1884716902774dc9025b457760d.tar.xz
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "The lion share of this pull request are fixes for clk-related breakage caused by other changes during this merge window. For some platforms the fix was as simple as selecting HAVE_CLK, for others like the Loongson 2 significant restructuring was required. The remainder are changes required to get the Lantiq code to work again." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Loongson 2: Sort out clock managment. MIPS: Loongson 1: more clk support and add select HAVE_CLK MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: Lantiq: Platform specific CLK fixup MIPS: Lantiq: Add device_tree_init function MIPS: Lantiq: Fix interface clock and PCI control register offset
Diffstat (limited to 'arch/mips/include/asm/mach-loongson/loongson.h')
-rw-r--r--arch/mips/include/asm/mach-loongson/loongson.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h
index 06367c37e1b2..5222a007bc21 100644
--- a/arch/mips/include/asm/mach-loongson/loongson.h
+++ b/arch/mips/include/asm/mach-loongson/loongson.h
@@ -245,7 +245,6 @@ static inline void do_perfcnt_IRQ(void)
#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
#include <linux/cpufreq.h>
-extern void loongson2_cpu_wait(void);
extern struct cpufreq_frequency_table loongson2_clockmod_table[];
/* Chip Config */