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authorHuacai Chen <chenhc@lemote.com>2014-11-04 09:13:26 +0300
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 09:45:01 +0300
commitec0f8d3fbb7ea12cfd10083e340381b96e7c34f8 (patch)
tree9550596fd52cccb8b7026c7135553255ddb0313d /arch/mips/include/asm/mach-loongson/irq.h
parentf490682a6b21ffed5acd7a0d49d8371e5e625d7a (diff)
downloadlinux-ec0f8d3fbb7ea12cfd10083e340381b96e7c34f8.tar.xz
MIPS: Loongson: Allow booting from any core
By offering Logical->Physical core id mapping, so as to reserve some physical cores via mask. This allow booting from any core when core-0 has problems. Since the maximun cores supported by Loongson-3 is 16, 32-bit cpu_startup_core_id can be split to 16-bit cpu_startup_core_id and 16-bit reserved_cores_mask for compatibility. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-loongson/irq.h')
-rw-r--r--arch/mips/include/asm/mach-loongson/irq.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-loongson/irq.h b/arch/mips/include/asm/mach-loongson/irq.h
index 34560bda6626..a281cca5f2fb 100644
--- a/arch/mips/include/asm/mach-loongson/irq.h
+++ b/arch/mips/include/asm/mach-loongson/irq.h
@@ -32,8 +32,7 @@
#define LOONGSON_INT_ROUTER_LPC LOONGSON_INT_ROUTER_ENTRY(0x0a)
#define LOONGSON_INT_ROUTER_HT1(n) LOONGSON_INT_ROUTER_ENTRY(n + 0x18)
-#define LOONGSON_INT_CORE0_INT0 0x11 /* route to int 0 of core 0 */
-#define LOONGSON_INT_CORE0_INT1 0x21 /* route to int 1 of core 0 */
+#define LOONGSON_INT_COREx_INTy(x, y) (1<<(x) | 1<<(y+4)) /* route to int y of core x */
#endif