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authorDavid Daney <ddaney@caviumnetworks.com>2009-05-14 02:59:55 +0400
committerRalf Baechle <ralf@linux-mips.org>2009-06-17 14:06:31 +0400
commitfbeda19f82aa07082d2e1607a9f5114141dae2ac (patch)
treec631cfe8884cd72a4fd709baf72e857edbbac477 /arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
parent9cffd154cf6817b130762501b91e753524ba2cd4 (diff)
downloadlinux-fbeda19f82aa07082d2e1607a9f5114141dae2ac.tar.xz
MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
Some CPUs have implementation dependent rdhwr registers. Allow them to be enabled on a per CPU basis. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h')
0 files changed, 0 insertions, 0 deletions