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authorDavid Daney <ddaney@avtrex.com>2008-09-23 11:05:54 +0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 19:18:56 +0400
commit6aa3524c182c01b8b8b7c21c4da20c742a9b4d86 (patch)
tree245fc4e9f26ad9e7a95e83087bfcc79528d1352e /arch/mips/include/asm/cpu-info.h
parent8192c9ea9ac44213d1266ecb64615519443979b3 (diff)
downloadlinux-6aa3524c182c01b8b8b7c21c4da20c742a9b4d86.tar.xz
MIPS: Add HARDWARE_WATCHPOINTS definitions and support code.
This is the main support code for the patch. Here we just add the code, the following patches hook it up. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/include/asm/watch.h create mode 100644 arch/mips/kernel/watch.c
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
-rw-r--r--arch/mips/include/asm/cpu-info.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 2de73dbb2e9e..744cd8fb107f 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -12,6 +12,8 @@
#ifndef __ASM_CPU_INFO_H
#define __ASM_CPU_INFO_H
+#include <linux/types.h>
+
#include <asm/cache.h>
/*
@@ -69,6 +71,10 @@ struct cpuinfo_mips {
int tc_id; /* Thread Context number */
#endif
void *data; /* Additional data */
+ unsigned int watch_reg_count; /* Number that exist */
+ unsigned int watch_reg_use_cnt; /* Usable by ptrace */
+#define NUM_WATCH_REGS 4
+ u16 watch_reg_masks[NUM_WATCH_REGS];
} __attribute__((aligned(SMP_CACHE_BYTES)));
extern struct cpuinfo_mips cpu_data[];