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authorPaul Burton <paul.burton@mips.com>2019-02-07 22:07:04 +0300
committerPaul Burton <paul.burton@mips.com>2019-02-07 23:59:45 +0300
commit3315b6b336c88969547f7e9f2e105a815eea529a (patch)
tree811d822af9c1fa64ed7ba432a612d55631f95502 /arch/mips/include/asm/cacheflush.h
parentc7e2d71dda7ac4731bae54a25c49cd81fe7b9046 (diff)
downloadlinux-3315b6b336c88969547f7e9f2e105a815eea529a.tar.xz
MIPS: Delete unused flush_cache_sigtramp()
Commit adcc81f148d7 ("MIPS: math-emu: Write-protect delay slot emulation pages") left flush_cache_sigtramp() unused. Delete the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/cacheflush.h')
-rw-r--r--arch/mips/include/asm/cacheflush.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cacheflush.h b/arch/mips/include/asm/cacheflush.h
index 4812d1fed0c2..d687b40b9fbb 100644
--- a/arch/mips/include/asm/cacheflush.h
+++ b/arch/mips/include/asm/cacheflush.h
@@ -25,7 +25,6 @@
*
* MIPS specific flush operations:
*
- * - flush_cache_sigtramp() flush signal trampoline
* - flush_icache_all() flush the entire instruction cache
* - flush_data_cache_page() flushes a page from the data cache
* - __flush_icache_user_range(start, end) flushes range of user instructions
@@ -110,7 +109,6 @@ extern void copy_from_user_page(struct vm_area_struct *vma,
struct page *page, unsigned long vaddr, void *dst, const void *src,
unsigned long len);
-extern void (*flush_cache_sigtramp)(unsigned long addr);
extern void (*flush_icache_all)(void);
extern void (*local_flush_data_cache_page)(void * addr);
extern void (*flush_data_cache_page)(unsigned long addr);