diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-11 18:10:28 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-30 04:14:49 +0300 |
| commit | 005985609ff72df3257fde6b29aa9d71342c2a6b (patch) | |
| tree | 1cf86359ccd44f2b5fbb88f13059b18bafd505fd /arch/mips/dec | |
| parent | 187933f23679c413706030aefad9e85e79164c44 (diff) | |
| download | linux-005985609ff72df3257fde6b29aa9d71342c2a6b.tar.xz | |
[MIPS] mips HPT cleanup: make clocksource_mips public
Make clocksource_mips public and get rid of mips_hpt_read,
mips_hpt_mask.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec')
| -rw-r--r-- | arch/mips/dec/time.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 69e424e9ab6f..8b7e0c17ac35 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c @@ -151,7 +151,7 @@ static void dec_timer_ack(void) CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ } -static unsigned int dec_ioasic_hpt_read(void) +static cycle_t dec_ioasic_hpt_read(void) { /* * The free-running counter is 32-bit which is good for about @@ -171,7 +171,7 @@ void __init dec_time_init(void) if (!cpu_has_counter && IOASIC) /* For pre-R4k systems we use the I/O ASIC's counter. */ - mips_hpt_read = dec_ioasic_hpt_read; + clocksource_mips.read = dec_ioasic_hpt_read; /* Set up the rate of periodic DS1287 interrupts. */ CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); |