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authorLen Brown <len.brown@intel.com>2005-12-07 01:31:30 +0300
committerLen Brown <len.brown@intel.com>2005-12-07 01:31:30 +0300
commit3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch)
treeab8a881a14478598a0c8bda0d26c62cdccfffd6d /arch/mips/ddb5xxx/ddb5074
parent378b2556f4e09fa6f87ff0cb5c4395ff28257d02 (diff)
parent9115a6c787596e687df03010d97fccc5e0762506 (diff)
downloadlinux-3d5271f9883cba7b54762bc4fe027d4172f06db7.tar.xz
Pull release into acpica branch
Diffstat (limited to 'arch/mips/ddb5xxx/ddb5074')
-rw-r--r--arch/mips/ddb5xxx/ddb5074/nile4_pic.c15
-rw-r--r--arch/mips/ddb5xxx/ddb5074/setup.c4
2 files changed, 8 insertions, 11 deletions
diff --git a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c b/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
index 68c127cd70c9..8743ffce8653 100644
--- a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
+++ b/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
@@ -209,14 +209,13 @@ static void nile4_irq_end(unsigned int irq) {
#define nile4_irq_shutdown nile4_disable_irq
static hw_irq_controller nile4_irq_controller = {
- "nile4",
- nile4_irq_startup,
- nile4_irq_shutdown,
- nile4_enable_irq,
- nile4_disable_irq,
- nile4_ack_irq,
- nile4_irq_end,
- NULL
+ .typename = "nile4",
+ .startup = nile4_irq_startup,
+ .shutdown = nile4_irq_shutdown,
+ .enable = nile4_enable_irq,
+ .disable = nile4_disable_irq,
+ .ack = nile4_ack_irq,
+ .end = nile4_irq_end,
};
void nile4_irq_setup(u32 base) {
diff --git a/arch/mips/ddb5xxx/ddb5074/setup.c b/arch/mips/ddb5xxx/ddb5074/setup.c
index a73a5978d550..11535be265b9 100644
--- a/arch/mips/ddb5xxx/ddb5074/setup.c
+++ b/arch/mips/ddb5xxx/ddb5074/setup.c
@@ -85,7 +85,7 @@ static void __init ddb_time_init(void)
-static void __init ddb5074_setup(void)
+void __init plat_setup(void)
{
set_io_port_base(NILE4_PCI_IO_BASE);
isa_slot_offset = NILE4_PCI_MEM_BASE;
@@ -106,8 +106,6 @@ static void __init ddb5074_setup(void)
panic_timeout = 180;
}
-early_initcall(ddb5074_setup);
-
#define USE_NILE4_SERIAL 0
#if USE_NILE4_SERIAL