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authorChad Reese <kreese@caviumnetworks.com>2015-01-15 16:11:16 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-02-20 17:32:22 +0300
commit920cda3870557a50105f0c5eb783059b3aced86e (patch)
tree3fc43dbdb7608c78f5ff7de1aa9be3fe8239faff /arch/mips/cavium-octeon
parent726da2f82a1659da5d4d3473427fdb198ffde370 (diff)
downloadlinux-920cda3870557a50105f0c5eb783059b3aced86e.tar.xz
MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: Chad Reese <kreese@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
0 files changed, 0 insertions, 0 deletions