diff options
| author | 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2020-09-19 14:38:59 +0300 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-21 23:17:38 +0300 |
| commit | c1f6b45e630a76d47506303defe111a48b651db1 (patch) | |
| tree | 1cbaa1f1113f0d38db5e02c41379a34b1c36aa0e /arch/mips/boot/dts/ingenic/x1830.dtsi | |
| parent | 307c9926393aed6c48600bea218b9565f2292fcb (diff) | |
| download | linux-c1f6b45e630a76d47506303defe111a48b651db1.tar.xz | |
MIPS: Ingenic: Add CPU nodes for Ingenic SoCs.
Add 'cpus' node to the jz4725b.dtsi, jz4740.dtsi, jz4770.dtsi,
jz4780.dtsi, x1000.dtsi, and x1830.dtsi files.
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot/dts/ingenic/x1830.dtsi')
| -rw-r--r-- | arch/mips/boot/dts/ingenic/x1830.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index eb1214481a33..b05dac3ae308 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -8,6 +8,20 @@ #size-cells = <1>; compatible = "ingenic,x1830"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "ingenic,xburst-fpu2.0-mxu2.0"; + reg = <0>; + + clocks = <&cgu X1830_CLK_CPU>; + clock-names = "cpu"; + }; + }; + cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; |