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| author | Jonas Gorski <jonas.gorski@gmail.com> | 2019-05-02 15:26:57 +0300 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-07-22 01:23:24 +0300 |
| commit | a23c4134955e87d9e16149daedefd3a602fb019b (patch) | |
| tree | 084a9f93da5e22246ef3c45c93a2eae7a082e8ab /arch/mips/boot/dts/brcm/bcm63268.dtsi | |
| parent | 5dad549d94c8dac1a99bbc72d481d64dc4974ea3 (diff) | |
| download | linux-a23c4134955e87d9e16149daedefd3a602fb019b.tar.xz | |
MIPS: BMIPS: add clock controller nodes
Now that we have a driver for the clock controller, add nodes to allow
devices to make use of it.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'arch/mips/boot/dts/brcm/bcm63268.dtsi')
| -rw-r--r-- | arch/mips/boot/dts/brcm/bcm63268.dtsi | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi index 58790b173bb2..beec24145af7 100644 --- a/arch/mips/boot/dts/brcm/bcm63268.dtsi +++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi @@ -51,16 +51,22 @@ compatible = "simple-bus"; ranges; - periph_cntl: syscon@10000000 { + clkctl: clock-controller@10000004 { + compatible = "brcm,bcm63268-clocks"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; + + periph_cntl: syscon@10000008 { compatible = "syscon"; - reg = <0x10000000 0x14>; + reg = <0x10000000 0xc>; native-endian; }; reboot: syscon-reboot@10000008 { compatible = "syscon-reboot"; regmap = <&periph_cntl>; - offset = <0x8>; + offset = <0x0>; mask = <0x1>; }; |