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| author | Pawel Moll <pawel.moll@arm.com> | 2012-06-12 19:14:03 +0400 |
|---|---|---|
| committer | Pawel Moll <pawel.moll@arm.com> | 2012-07-12 19:16:56 +0400 |
| commit | d927daf5c81c9b6bf2d6a83dc4c8c60268930ee5 (patch) | |
| tree | e0a45cf8833d54d2b811b1b5a9635b3b8c844084 /arch/mips/bcm63xx/prom.c | |
| parent | ef5911966d2312478a74e93d993cd623a869ab10 (diff) | |
| download | linux-d927daf5c81c9b6bf2d6a83dc4c8c60268930ee5.tar.xz | |
ARM: vexpress: Check master site in daughterboard's sysctl operations
With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.
Fixed now, providing "get master site" API in motherboard's code.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/mips/bcm63xx/prom.c')
0 files changed, 0 insertions, 0 deletions