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authorHauke Mehrtens <hauke@hauke-m.de>2013-09-25 02:36:56 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 23:18:54 +0400
commite1ccbb65499b8ba1d90ae2134d56888c95e504bd (patch)
tree66ee8a2f90c96d7ef5008d3d4108bbf0fc2cb8d6 /arch/mips/bcm47xx
parentcb881f5e154c5bdeb4a440adc0b475e117c5dfc1 (diff)
downloadlinux-e1ccbb65499b8ba1d90ae2134d56888c95e504bd.tar.xz
MIPS: BCM47XX: add EARLY_PRINTK_8250 support
The BCM47xx SoCs have a 8250 serial compatible console at address 0x18000300 and an other at 0x18000400. On most devices 0x18000300 is wired to some pins on the board, we should use that. This is the smae for the AI (bcma) and the SB (ssb) bus, this is some offset on the chip common core. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5889/
Diffstat (limited to 'arch/mips/bcm47xx')
-rw-r--r--arch/mips/bcm47xx/prom.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index 99c3ce2d5b98..0af808dfd1ca 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -28,6 +28,8 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
+#include <linux/ssb/ssb_driver_chipcommon.h>
+#include <linux/ssb/ssb_regs.h>
#include <linux/smp.h>
#include <asm/bootinfo.h>
#include <bcm47xx.h>
@@ -94,9 +96,16 @@ static __init void prom_init_mem(void)
add_memory_region(0, mem, BOOT_MEM_RAM);
}
+/*
+ * This is the first serial on the chip common core, it is at this position
+ * for sb (ssb) and ai (bcma) bus.
+ */
+#define BCM47XX_SERIAL_ADDR (SSB_ENUM_BASE + SSB_CHIPCO_UART0_DATA)
+
void __init prom_init(void)
{
prom_init_mem();
+ setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
}
void __init prom_free_prom_memory(void)