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authorJeffrey Hugo <quic_jhugo@quicinc.com>2022-07-25 19:33:43 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-07-29 18:06:53 +0300
commit7f7939ead9e85ae79a12dee4700ea49256994c74 (patch)
tree4a6c78521382e49267a6a17ebb7c91695b977184 /arch/microblaze
parentaeb918b915a7d5cf1b08fee1f488a63f90d8cd4a (diff)
downloadlinux-7f7939ead9e85ae79a12dee4700ea49256994c74.tar.xz
PCI: hv: Fix interrupt mapping for multi-MSI
commit a2bad844a67b1c7740bda63e87453baf63c3a7f7 upstream. According to Dexuan, the hypervisor folks beleive that multi-msi allocations are not correct. compose_msi_msg() will allocate multi-msi one by one. However, multi-msi is a block of related MSIs, with alignment requirements. In order for the hypervisor to allocate properly aligned and consecutive entries in the IOMMU Interrupt Remapping Table, there should be a single mapping request that requests all of the multi-msi vectors in one shot. Dexuan suggests detecting the multi-msi case and composing a single request related to the first MSI. Then for the other MSIs in the same block, use the cached information. This appears to be viable, so do it. 4.14 backport - file moved to host/pci-hyperv.c. add hv_msi_get_int_vector helper function. Fixed merge conflict due to delivery_mode name change (APIC_DELIVERY_MODE_FIXED is the value given to dest_Fixed). Removed unused variable in hv_compose_msi_msg. Fixed reference to msi_desc->pci to point to the same is_msix variable. Removed changes to compose_msi_req_v3 since it doesn't exist yet. Added "reason" to put_pcichild (unused in function). Suggested-by: Dexuan Cui <decui@microsoft.com> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Dexuan Cui <decui@microsoft.com> Tested-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/1652282599-21643-1-git-send-email-quic_jhugo@quicinc.com Signed-off-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Carl Vanderlip <quic_carlv@quicinc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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