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| author | Jiri Kosina <jkosina@suse.cz> | 2011-02-15 12:24:31 +0300 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2011-02-15 12:24:31 +0300 |
| commit | 0a9d59a2461477bd9ed143c01af9df3f8f00fa81 (patch) | |
| tree | df997d1cfb0786427a0df1fbd6f0640fa4248cf4 /arch/m68k/include/asm/m5272sim.h | |
| parent | a23ce6da9677d245aa0aadc99f4197030350ab54 (diff) | |
| parent | 795abaf1e4e188c4171e3cd3dbb11a9fcacaf505 (diff) | |
| download | linux-0a9d59a2461477bd9ed143c01af9df3f8f00fa81.tar.xz | |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/m68k/include/asm/m5272sim.h')
| -rw-r--r-- | arch/m68k/include/asm/m5272sim.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index df3332c2317d..b7cc50abc831 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -12,6 +12,11 @@ #define m5272sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5272)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> + /* * Define the 5272 SIM register set addresses. */ @@ -62,6 +67,9 @@ #define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */ #define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */ +#define MCFUART_BASE1 0x100 /* Base address of UART1 */ +#define MCFUART_BASE2 0x140 /* Base address of UART2 */ + #define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */ #define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */ #define MCFSIM_PADAT (MCF_MBAR + 0x86) /* Port A Data (r/w) */ |