diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2009-04-27 09:09:29 +0400 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2009-09-16 03:43:39 +0400 |
| commit | cd3dd4068db5e1258a14b63e0feaf0332640d896 (patch) | |
| tree | 07b28dab223d4a19eedb517d2792aba7753ecb0b /arch/m68k/include/asm/m520xsim.h | |
| parent | 584320156b7e42e74105ca78bdf895d2b0269251 (diff) | |
| download | linux-cd3dd4068db5e1258a14b63e0feaf0332640d896.tar.xz | |
m68knommu: use general interrupt controller for ColdFire 520x family
Create general interrupt controller code for the ColdFire 520x family,
that does proper masking and unmasking of interrupts. With this in
place some of the driver hacks in place to support ColdFire interrupts
can finally go away.
Within the ColdFire family there is a variety of different interrupt
controllers in use. Some are used on multiple parts, some on only one.
There is quite some differences in some varients, so much so that
common code for all ColdFire parts would be impossible.
This commit introduces code to support one of the newer interrupt
controllers in the ColdFire 5208 and 5207 parts. It has very simple
mask and unmask operations, so is one of the easiest to support.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m520xsim.h')
| -rw-r--r-- | arch/m68k/include/asm/m520xsim.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index e80b6a54ea9c..e79b9bc76a12 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -22,6 +22,8 @@ #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ +#define MCFINTC_SIMR 0x1c /* Set interrupt mask 0-63 */ +#define MCFINTC_CIMR 0x1d /* Clear interrupt mask 0-63 */ #define MCFINTC_ICR0 0x40 /* Base ICR register */ #define MCFINT_VECBASE 64 |