diff options
author | Jun Yi <yijun@loongson.cn> | 2022-07-21 14:10:49 +0300 |
---|---|---|
committer | Huacai Chen <chenhuacai@loongson.cn> | 2022-07-29 13:22:32 +0300 |
commit | f62b7626cb79dfbfe292145b7ebeee4dc63c9499 (patch) | |
tree | 22fbfd489c110c2af439723e9a4384812531ee25 /arch/loongarch/include/asm/atomic.h | |
parent | ab6e57a69df515cc9231b578de5b820f9ba3d0be (diff) | |
download | linux-f62b7626cb79dfbfe292145b7ebeee4dc63c9499.tar.xz |
LoongArch: Remove useless header compiler.h
The content of LoongArch's compiler.h is trivial, with some unused
anywhere, so inline the definitions and remove the header.
Signed-off-by: Jun Yi <yijun@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/include/asm/atomic.h')
-rw-r--r-- | arch/loongarch/include/asm/atomic.h | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/loongarch/include/asm/atomic.h b/arch/loongarch/include/asm/atomic.h index dc2ae4f22c8e..6b9aca9ab6e9 100644 --- a/arch/loongarch/include/asm/atomic.h +++ b/arch/loongarch/include/asm/atomic.h @@ -10,7 +10,6 @@ #include <linux/types.h> #include <asm/barrier.h> #include <asm/cmpxchg.h> -#include <asm/compiler.h> #if __SIZEOF_LONG__ == 4 #define __LL "ll.w " @@ -163,8 +162,7 @@ static inline int arch_atomic_sub_if_positive(int i, atomic_t *v) " beqz %1, 1b \n" "2: \n" __WEAK_LLSC_MB - : "=&r" (result), "=&r" (temp), - "+" GCC_OFF_SMALL_ASM() (v->counter) + : "=&r" (result), "=&r" (temp), "+ZC" (v->counter) : "I" (-i)); } else { __asm__ __volatile__( @@ -176,8 +174,7 @@ static inline int arch_atomic_sub_if_positive(int i, atomic_t *v) " beqz %1, 1b \n" "2: \n" __WEAK_LLSC_MB - : "=&r" (result), "=&r" (temp), - "+" GCC_OFF_SMALL_ASM() (v->counter) + : "=&r" (result), "=&r" (temp), "+ZC" (v->counter) : "r" (i)); } @@ -326,8 +323,7 @@ static inline long arch_atomic64_sub_if_positive(long i, atomic64_t *v) " beqz %1, 1b \n" "2: \n" __WEAK_LLSC_MB - : "=&r" (result), "=&r" (temp), - "+" GCC_OFF_SMALL_ASM() (v->counter) + : "=&r" (result), "=&r" (temp), "+ZC" (v->counter) : "I" (-i)); } else { __asm__ __volatile__( @@ -339,8 +335,7 @@ static inline long arch_atomic64_sub_if_positive(long i, atomic64_t *v) " beqz %1, 1b \n" "2: \n" __WEAK_LLSC_MB - : "=&r" (result), "=&r" (temp), - "+" GCC_OFF_SMALL_ASM() (v->counter) + : "=&r" (result), "=&r" (temp), "+ZC" (v->counter) : "r" (i)); } |