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| author | Takashi Iwai <tiwai@suse.de> | 2010-06-02 16:15:10 +0400 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2010-06-02 16:15:10 +0400 |
| commit | e4caa8bab3862a7694ab7c6dfede223227ad7fc5 (patch) | |
| tree | 9fa537a72f00f6b4f86c2da7be2e9554304a8ec4 /arch/ia64/include/asm/asmmacro.h | |
| parent | 9f75c1b12c5ef392ddcea575b13560842c28b1b3 (diff) | |
| parent | edb39935c8b19fcd9a8f619d0bc1e9d04594cd2b (diff) | |
| download | linux-e4caa8bab3862a7694ab7c6dfede223227ad7fc5.tar.xz | |
Merge branch 'master' of git.alsa-project.org:alsa-kernel into fix/hda
Diffstat (limited to 'arch/ia64/include/asm/asmmacro.h')
| -rw-r--r-- | arch/ia64/include/asm/asmmacro.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/ia64/include/asm/asmmacro.h b/arch/ia64/include/asm/asmmacro.h index c1642fd64029..3ab6d75aa3db 100644 --- a/arch/ia64/include/asm/asmmacro.h +++ b/arch/ia64/include/asm/asmmacro.h @@ -70,12 +70,12 @@ name: * path (ivt.S - TLB miss processing) or in places where it might not be * safe to use a "tpa" instruction (mca_asm.S - error recovery). */ - .section ".data.patch.vtop", "a" // declare section & section attributes + .section ".data..patch.vtop", "a" // declare section & section attributes .previous #define LOAD_PHYSICAL(pr, reg, obj) \ [1:](pr)movl reg = obj; \ - .xdata4 ".data.patch.vtop", 1b-. + .xdata4 ".data..patch.vtop", 1b-. /* * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, @@ -84,11 +84,11 @@ name: #define DO_MCKINLEY_E9_WORKAROUND #ifdef DO_MCKINLEY_E9_WORKAROUND - .section ".data.patch.mckinley_e9", "a" + .section ".data..patch.mckinley_e9", "a" .previous /* workaround for Itanium 2 Errata 9: */ # define FSYS_RETURN \ - .xdata4 ".data.patch.mckinley_e9", 1f-.; \ + .xdata4 ".data..patch.mckinley_e9", 1f-.; \ 1:{ .mib; \ nop.m 0; \ mov r16=ar.pfs; \ @@ -107,11 +107,11 @@ name: * If physical stack register size is different from DEF_NUM_STACK_REG, * dynamically patch the kernel for correct size. */ - .section ".data.patch.phys_stack_reg", "a" + .section ".data..patch.phys_stack_reg", "a" .previous #define LOAD_PHYS_STACK_REG_SIZE(reg) \ [1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ - .xdata4 ".data.patch.phys_stack_reg", 1b-. + .xdata4 ".data..patch.phys_stack_reg", 1b-. /* * Up until early 2004, use of .align within a function caused bad unwind info. |