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author | Wanpeng Li <wanpengli@tencent.com> | 2021-06-07 10:19:43 +0300 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-06-08 19:22:26 +0300 |
commit | e898da784aed0ea65f7672d941c01dc9b79e6299 (patch) | |
tree | 32206b1e1480ff8574a97ef8f569444858c117a4 /arch/hexagon | |
parent | 4f13d471e5d11034d56161af56d0f9396bc0b384 (diff) | |
download | linux-e898da784aed0ea65f7672d941c01dc9b79e6299.tar.xz |
KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer
According to the SDM 10.5.4.1:
A write of 0 to the initial-count register effectively stops the local
APIC timer, in both one-shot and periodic mode.
However, the lapic timer oneshot/periodic mode which is emulated by vmx-preemption
timer doesn't stop by writing 0 to TMICT since vmx->hv_deadline_tsc is still
programmed and the guest will receive the spurious timer interrupt later. This
patch fixes it by also cancelling the vmx-preemption timer when writing 0 to
the initial-count register.
Reviewed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Message-Id: <1623050385-100988-1-git-send-email-wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/hexagon')
0 files changed, 0 insertions, 0 deletions