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| author | Richard Kuo <rkuo@codeaurora.org> | 2013-03-23 01:05:40 +0400 |
|---|---|---|
| committer | Richard Kuo <rkuo@codeaurora.org> | 2013-05-01 04:40:22 +0400 |
| commit | 8f5a0b9dffeb3cb94f2b0622b6fe0717512ef54b (patch) | |
| tree | d85d4b7531645b4b189fb88dd8d6b4b62072284b /arch/hexagon/include/asm/mem-layout.h | |
| parent | e0025a72c37ca404fbf31d569439c20bfb04295e (diff) | |
| download | linux-8f5a0b9dffeb3cb94f2b0622b6fe0717512ef54b.tar.xz | |
Hexagon: add support for ARCH_PFN_OFFSET
Add support for loading the kernel at a physical offset. The
offset should still be 4M aligned.
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Diffstat (limited to 'arch/hexagon/include/asm/mem-layout.h')
| -rw-r--r-- | arch/hexagon/include/asm/mem-layout.h | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/arch/hexagon/include/asm/mem-layout.h b/arch/hexagon/include/asm/mem-layout.h index af16e977c55e..1426cd71a1d3 100644 --- a/arch/hexagon/include/asm/mem-layout.h +++ b/arch/hexagon/include/asm/mem-layout.h @@ -32,16 +32,25 @@ #define PAGE_OFFSET _AC(0xc0000000, UL) /* - * LOAD_ADDRESS is the physical/linear address of where in memory - * the kernel gets loaded. The 12 least significant bits must be zero (0) - * due to limitations on setting the EVB - * + * Compiling for a platform that needs a crazy physical offset + * (like if the memory starts at 1GB and up) means we need + * an actual PHYS_OFFSET. Should be set up in head.S. */ -#ifndef LOAD_ADDRESS -#define LOAD_ADDRESS 0x00000000 +#ifdef CONFIG_HEXAGON_PHYS_OFFSET +#ifndef __ASSEMBLY__ +extern unsigned long __phys_offset; +#endif +#define PHYS_OFFSET __phys_offset +#endif + +#ifndef PHYS_OFFSET +#define PHYS_OFFSET 0 #endif +#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) +#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET + #define TASK_SIZE (PAGE_OFFSET) /* not sure how these are used yet */ |