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authorArnd Bergmann <arnd@arndb.de>2018-03-07 23:21:59 +0300
committerArnd Bergmann <arnd@arndb.de>2018-03-10 01:19:58 +0300
commitfd8773f9f544955f6f47dc2ac3ab85ad64376b7f (patch)
tree2eedaf10b5a4b62df0d3b514cec9614a6af6b563 /arch/frv/lib/cache.S
parent739d875dd6982618020d30f58f8acf10f6076e6d (diff)
downloadlinux-fd8773f9f544955f6f47dc2ac3ab85ad64376b7f.tar.xz
arch: remove frv port
The Fujitsu FRV kernel port has been around for a long time, but has not seen regular updates in several years and instead was marked 'Orphaned' in 2016 by long-time maintainer David Howells. The SoC product line apparently is apparently still around in the form of the Socionext Milbeaut image processor, but this one no longer uses the FRV CPU cores. This removes all FRV specific files from the kernel. Link: http://www.socionext.com/en/products/assp/milbeaut/ Cc: David Howells <dhowells@redhat.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/frv/lib/cache.S')
-rw-r--r--arch/frv/lib/cache.S98
1 files changed, 0 insertions, 98 deletions
diff --git a/arch/frv/lib/cache.S b/arch/frv/lib/cache.S
deleted file mode 100644
index 0c4fb204911b..000000000000
--- a/arch/frv/lib/cache.S
+++ /dev/null
@@ -1,98 +0,0 @@
-/* cache.S: cache management routines
- *
- * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/spr-regs.h>
-#include <asm/cache.h>
-
- .text
- .p2align 4
-
-###############################################################################
-#
-# Write back a range of dcache
-# - void frv_dcache_writeback(unsigned long start [GR8], unsigned long size [GR9])
-#
-###############################################################################
- .globl frv_dcache_writeback
- .type frv_dcache_writeback,@function
-frv_dcache_writeback:
- andi gr8,~(L1_CACHE_BYTES-1),gr8
-
-2: dcf @(gr8,gr0)
- addi gr8,#L1_CACHE_BYTES,gr8
- cmp gr9,gr8,icc0
- bhi icc0,#2,2b
-
- membar
- bralr
- .size frv_dcache_writeback, .-frv_dcache_writeback
-
-##############################################################################
-#
-# Invalidate a range of dcache and icache
-# - void frv_cache_invalidate(unsigned long start [GR8], unsigned long end [GR9]);
-#
-###############################################################################
- .globl frv_cache_invalidate
- .type frv_cache_invalidate,@function
-frv_cache_invalidate:
- andi gr8,~(L1_CACHE_BYTES-1),gr8
-
-2: dci @(gr8,gr0)
- ici @(gr8,gr0)
- addi gr8,#L1_CACHE_BYTES,gr8
- cmp gr9,gr8,icc0
- bhi icc0,#2,2b
-
- membar
- bralr
- .size frv_cache_invalidate, .-frv_cache_invalidate
-
-##############################################################################
-#
-# Invalidate a range of icache
-# - void frv_icache_invalidate(unsigned long start [GR8], unsigned long end [GR9]);
-#
-###############################################################################
- .globl frv_icache_invalidate
- .type frv_icache_invalidate,@function
-frv_icache_invalidate:
- andi gr8,~(L1_CACHE_BYTES-1),gr8
-
-2: ici @(gr8,gr0)
- addi gr8,#L1_CACHE_BYTES,gr8
- cmp gr9,gr8,icc0
- bhi icc0,#2,2b
-
- membar
- bralr
- .size frv_icache_invalidate, .-frv_icache_invalidate
-
-###############################################################################
-#
-# Write back and invalidate a range of dcache and icache
-# - void frv_cache_wback_inv(unsigned long start [GR8], unsigned long end [GR9])
-#
-###############################################################################
- .globl frv_cache_wback_inv
- .type frv_cache_wback_inv,@function
-frv_cache_wback_inv:
- andi gr8,~(L1_CACHE_BYTES-1),gr8
-
-2: dcf @(gr8,gr0)
- ici @(gr8,gr0)
- addi gr8,#L1_CACHE_BYTES,gr8
- cmp gr9,gr8,icc0
- bhi icc0,#2,2b
-
- membar
- bralr
- .size frv_cache_wback_inv, .-frv_cache_wback_inv