Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (32 commits)
  Blackfin: ip0x: fix unused variable warning
  Blackfin: punt unused HDMA masks
  Blackfin: wire up new syscalls
  Blackfin/ipipe: restore pipeline bits in irqflags
  Blackfin/ipipe: fix deferred pipeline sync for the root stage
  Blackfin/ipipe: upgrade to I-pipe mainline
  Blackfin: cpufreq: fix typos
  Blackfin: enable GENERIC_HARDIRQS_NO_DEPRECATED
  Blackfin: SMP: convert to irq chip functions
  Blackfin: use accessor functions in show_interrupts()
  Blackfin: use proper wrapper functions for modifying irq status
  Blackfin: convert gpio irq_chip to new functions
  Blackfin: convert mac irq_chip to new functions
  Blackfin: convert error irq_chip to new functions
  Blackfin: convert internal irq_chip to new functions
  Blackfin: convert core irq_chip to new functions
  Blackfin: use proper wrappers for irq_desc
  Blackfin: optimize startup code
  Blackfin: SMP: work around anomaly 05000491
  Blackfin: SMP: implement cpu_freq support
  ...

1 files changed, 32 insertions, 6 deletions

diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index ab4a925a443e..9f4dd35bfd74 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -11,12 +11,6 @@
 #include <asm/cache.h>
 #include <asm/page.h>
 
-#ifdef CONFIG_CACHE_FLUSH_L1
-.section .l1.text
-#else
-.text
-#endif
-
 /* 05000443 - IFLUSH cannot be last instruction in hardware loop */
 #if ANOMALY_05000443
 # define BROK_FLUSH_INST "IFLUSH"
@@ -68,11 +62,43 @@
 	RTS;
 .endm
 
+#ifdef CONFIG_ICACHE_FLUSH_L1
+.section .l1.text
+#else
+.text
+#endif
+
 /* Invalidate all instruction cache lines assocoiated with this memory area */
+#ifdef CONFIG_SMP
+# define _blackfin_icache_flush_range _blackfin_icache_flush_range_l1
+#endif
 ENTRY(_blackfin_icache_flush_range)
 	do_flush IFLUSH
 ENDPROC(_blackfin_icache_flush_range)
 
+#ifdef CONFIG_SMP
+.text
+# undef _blackfin_icache_flush_range
+ENTRY(_blackfin_icache_flush_range)
+	p0.L = LO(DSPID);
+	p0.H = HI(DSPID);
+	r3 = [p0];
+	r3 = r3.b (z);
+	p2 = r3;
+	p0.L = _blackfin_iflush_l1_entry;
+	p0.H = _blackfin_iflush_l1_entry;
+	p0 = p0 + (p2 << 2);
+	p1 = [p0];
+	jump (p1);
+ENDPROC(_blackfin_icache_flush_range)
+#endif
+
+#ifdef CONFIG_DCACHE_FLUSH_L1
+.section .l1.text
+#else
+.text
+#endif
+
 /* Throw away all D-cached data in specified region without any obligation to
  * write them back.  Since the Blackfin ISA does not have an "invalidate"
  * instruction, we use flush/invalidate.  Perhaps as a speed optimization we