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| author | Scott Jiang <scott.jiang.linux@gmail.com> | 2012-05-19 00:13:03 +0400 |
|---|---|---|
| committer | Bob Liu <lliubbo@gmail.com> | 2012-07-24 09:39:47 +0400 |
| commit | 2cdd7008334854a1e9a0b7ceefdccbd3fdfe372a (patch) | |
| tree | 27584df435c1116d68810535e05a2e18765ab4ef /arch/blackfin/mach-bf609/boards/ezkit.c | |
| parent | 28a33cbc24e4256c143dce96c7d93bf423229f92 (diff) | |
| download | linux-2cdd7008334854a1e9a0b7ceefdccbd3fdfe372a.tar.xz | |
bf609: change ad7877 cs and irq pin
Extend chip select number supported by spi master as well
because we can accept SPISEL1-SPISEL7 and all GPIO.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin/mach-bf609/boards/ezkit.c')
| -rw-r--r-- | arch/blackfin/mach-bf609/boards/ezkit.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c index ac64f47217c1..12488df1ac80 100644 --- a/arch/blackfin/mach-bf609/boards/ezkit.c +++ b/arch/blackfin/mach-bf609/boards/ezkit.c @@ -981,10 +981,10 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { { .modalias = "ad7877", .platform_data = &bfin_ad7877_ts_info, - .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */ + .irq = IRQ_PD9, .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ .bus_num = 0, - .chip_select = 2, + .chip_select = 4, }, #endif #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) @@ -1050,7 +1050,7 @@ static struct resource bfin_spi1_resource[] = { /* SPI controller data */ static struct bfin6xx_spi_master bf60x_spi_master_info0 = { - .num_chipselect = 4, + .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, }; @@ -1065,7 +1065,7 @@ static struct platform_device bf60x_spi_master0 = { }; static struct bfin6xx_spi_master bf60x_spi_master_info1 = { - .num_chipselect = 4, + .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, }; |