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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-27 00:23:17 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-27 00:23:17 +0400 |
| commit | 7f268a2ba7c884a239713696238dd4207a57dd9a (patch) | |
| tree | fdc02fecda32f5df8de3ddc2c01c29ba68e6a42b /arch/blackfin/mach-bf533 | |
| parent | 689796a141cea79d745a4689c65dd01c39e5e100 (diff) | |
| parent | 2d2009806dd843f3adc0cbbb5d2204980f28111a (diff) | |
| download | linux-7f268a2ba7c884a239713696238dd4207a57dd9a.tar.xz | |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (30 commits)
Blackfin arch: If we double fault, rather than hang forever, reset
Blackfin arch: When icache is off, make sure people know it
Blackfin arch: Fix bug - skip single step in high priority interrupt handler instead of disabling all interrupts in single step debugging.
Blackfin arch: cache the values of vco/sclk/cclk as the overhead of doing so (~24 bytes) is worth avoiding the software mult/div routines
Blackfin arch: fix bug - IMDMA is not type struct dma_register
Blackfin arch: check the EXTBANKS field of the DDRCTL1 register to see if we are using both memory banks
Blackfin arch: Apply Bluetechnix CM-BF527 board support patch
Blackfin arch: Add unwinding for stack info, and a little more detail on trace buffer
Blackfin arch: Add ISP1760 board resources to BF548-EZKIT
Blackfin arch: fix bug - detect 0.1 silicon revision BF527-EZKIT as 0.0 version
Blackfin arch: add missing IORESOURCE_MEM flags to UART3
Blackfin arch: Add return value check in bfin_sir_probe(), remove SSYNC().
Blackfin arch: Extend sram malloc to handle L2 SRAM.
Blackfin arch: Remove useless config option.
Blackfin arch: change L1 malloc to base on slab cache and lists.
Blackfin arch: use local labels and ENDPROC() markings
Blackfin arch: Do not need this dualcore test module in kernel.
Blackfin arch: Allow ptrace to peek and poke application data in L1 data SRAM.
Blackfin arch: Add ANOMALY_05000368 workaround
Blackfin arch: Functional power management support
...
Diffstat (limited to 'arch/blackfin/mach-bf533')
| -rw-r--r-- | arch/blackfin/mach-bf533/head.S | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S index 1295deac00a4..c671e8549b17 100644 --- a/arch/blackfin/mach-bf533/head.S +++ b/arch/blackfin/mach-bf533/head.S @@ -31,7 +31,7 @@ #include <linux/init.h> #include <asm/blackfin.h> #include <asm/trace.h> -#if CONFIG_BFIN_KERNEL_CLOCK +#ifdef CONFIG_BFIN_KERNEL_CLOCK #include <asm/mach-common/clocks.h> #include <asm/mach/mem_init.h> #endif @@ -186,7 +186,7 @@ ENTRY(__start) /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ call _bf53x_relocate_l1_mem; -#if CONFIG_BFIN_KERNEL_CLOCK +#ifdef CONFIG_BFIN_KERNEL_CLOCK call _start_dma_code; #endif @@ -319,7 +319,7 @@ ENDPROC(_real_start) __FINIT .section .l1.text -#if CONFIG_BFIN_KERNEL_CLOCK +#ifdef CONFIG_BFIN_KERNEL_CLOCK ENTRY(_start_dma_code) p0.h = hi(SIC_IWR); p0.l = lo(SIC_IWR); @@ -390,12 +390,6 @@ ENTRY(_start_dma_code) w[p0] = r0.l; ssync; - p0.l = LO(EBIU_SDBCTL); - p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */ - r0 = mem_SDBCTL; - w[p0] = r0.l; - ssync; - P2.H = hi(EBIU_SDGCTL); P2.L = lo(EBIU_SDGCTL); R0 = [P2]; |