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| author | David Vrabel <david.vrabel@csr.com> | 2009-01-22 22:12:32 +0300 |
|---|---|---|
| committer | David Vrabel <david.vrabel@csr.com> | 2009-01-22 22:12:32 +0300 |
| commit | dff243f7cb3a2ebbb09093066c1bc4a90ff5b3a4 (patch) | |
| tree | 1c63e7c2f879cd322ca785671b74b4ff796dd24c /arch/blackfin/mach-bf533/include/mach/irq.h | |
| parent | a5e6ced58d423cb09c4fc0087dcfdb0b5deb5e1c (diff) | |
| parent | f3b8436ad9a8ad36b3c9fa1fe030c7f38e5d3d0b (diff) | |
| download | linux-dff243f7cb3a2ebbb09093066c1bc4a90ff5b3a4.tar.xz | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-upstream
Diffstat (limited to 'arch/blackfin/mach-bf533/include/mach/irq.h')
| -rw-r--r-- | arch/blackfin/mach-bf533/include/mach/irq.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/irq.h b/arch/blackfin/mach-bf533/include/mach/irq.h index 5aa38e5da6b7..db1e346cd1aa 100644 --- a/arch/blackfin/mach-bf533/include/mach/irq.h +++ b/arch/blackfin/mach-bf533/include/mach/irq.h @@ -90,19 +90,19 @@ Core Emulation ** #define IRQ_SPORT0_ERROR 10 /*SPORT0 Error Interrupt */ #define IRQ_SPORT1_ERROR 11 /*SPORT1 Error Interrupt */ #define IRQ_SPI_ERROR 12 /*SPI Error Interrupt */ -#define IRQ_UART_ERROR 13 /*UART Error Interrupt */ +#define IRQ_UART0_ERROR 13 /*UART Error Interrupt */ #define IRQ_RTC 14 /*RTC Interrupt */ #define IRQ_PPI 15 /*DMA0 Interrupt (PPI) */ #define IRQ_SPORT0_RX 16 /*DMA1 Interrupt (SPORT0 RX) */ #define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */ #define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */ #define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */ -#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ -#define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */ -#define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */ -#define IRQ_TMR0 23 /*Timer 0 */ -#define IRQ_TMR1 24 /*Timer 1 */ -#define IRQ_TMR2 25 /*Timer 2 */ +#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ +#define IRQ_UART0_RX 21 /*DMA6 Interrupt (UART RX) */ +#define IRQ_UART0_TX 22 /*DMA7 Interrupt (UART TX) */ +#define IRQ_TIMER0 23 /*Timer 0 */ +#define IRQ_TIMER1 24 /*Timer 1 */ +#define IRQ_TIMER2 25 /*Timer 2 */ #define IRQ_PROG_INTA 26 /*Programmable Flags A (8) */ #define IRQ_PROG_INTB 27 /*Programmable Flags B (8) */ #define IRQ_MEM_DMA0 28 /*DMA8/9 Interrupt (Memory DMA Stream 0) */ |