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| author | Jiri Kosina <jkosina@suse.cz> | 2011-06-10 16:46:48 +0400 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2011-06-10 16:46:57 +0400 |
| commit | 5be5758c114b18260c6fd4c8373bf89e39b0fe82 (patch) | |
| tree | 54390f904df6ff11e570f764c444356cf2709fda /arch/blackfin/include/asm/cacheflush.h | |
| parent | 71f66a6580c4e42df377bebbcca5c72661a40700 (diff) | |
| parent | 7f45e5cd1718ed769295033ca214032848a0097d (diff) | |
| download | linux-5be5758c114b18260c6fd4c8373bf89e39b0fe82.tar.xz | |
Merge branch 'master' into for-next
Sync with Linus' tree to be able to apply patches against new
code I have in queue.
Diffstat (limited to 'arch/blackfin/include/asm/cacheflush.h')
| -rw-r--r-- | arch/blackfin/include/asm/cacheflush.h | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index 77135b62818e..9a5b2c572ebf 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h @@ -39,8 +39,13 @@ extern void blackfin_invalidate_entire_icache(void); static inline void flush_icache_range(unsigned start, unsigned end) { -#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK) - blackfin_dcache_flush_range(start, end); +#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) + if (end <= physical_mem_end) + blackfin_dcache_flush_range(start, end); +#endif +#if defined(CONFIG_BFIN_L2_WRITEBACK) + if (start >= L2_START && end <= L2_START + L2_LENGTH) + blackfin_dcache_flush_range(start, end); #endif /* Make sure all write buffers in the data side of the core @@ -52,9 +57,17 @@ static inline void flush_icache_range(unsigned start, unsigned end) * the pipeline. */ SSYNC(); -#if defined(CONFIG_BFIN_ICACHE) - blackfin_icache_flush_range(start, end); - flush_icache_range_others(start, end); +#if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) + if (end <= physical_mem_end) { + blackfin_icache_flush_range(start, end); + flush_icache_range_others(start, end); + } +#endif +#if defined(CONFIG_BFIN_L2_ICACHEABLE) + if (start >= L2_START && end <= L2_START + L2_LENGTH) { + blackfin_icache_flush_range(start, end); + flush_icache_range_others(start, end); + } #endif } |