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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-21 06:05:28 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-21 06:05:28 +0400
commit54d46ea993744c5408e39ce0cb4851e13cbea716 (patch)
tree8e38fa92cc2ae72e0353c44e1e68be9bf5a7a058 /arch/avr32/Kconfig
parentf59dc2bb5a50b26ea751f9eac1c81e4cc7de5257 (diff)
parent50ececcfa7d1acee085b2c518cad495062db6379 (diff)
downloadlinux-54d46ea993744c5408e39ce0cb4851e13cbea716.tar.xz
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull signal handling cleanups from Al Viro: "sigaltstack infrastructure + conversion for x86, alpha and um, COMPAT_SYSCALL_DEFINE infrastructure. Note that there are several conflicts between "unify SS_ONSTACK/SS_DISABLE definitions" and UAPI patches in mainline; resolution is trivial - just remove definitions of SS_ONSTACK and SS_DISABLED from arch/*/uapi/asm/signal.h; they are all identical and include/uapi/linux/signal.h contains the unified variant." Fixed up conflicts as per Al. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: alpha: switch to generic sigaltstack new helpers: __save_altstack/__compat_save_altstack, switch x86 and um to those generic compat_sys_sigaltstack() introduce generic sys_sigaltstack(), switch x86 and um to it new helper: compat_user_stack_pointer() new helper: restore_altstack() unify SS_ONSTACK/SS_DISABLE definitions new helper: current_user_stack_pointer() missing user_stack_pointer() instances Bury the conditionals from kernel_thread/kernel_execve series COMPAT_SYSCALL_DEFINE: infrastructure
Diffstat (limited to 'arch/avr32/Kconfig')
-rw-r--r--arch/avr32/Kconfig2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index e40c9bd79143..2ae6591b3a55 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -17,8 +17,6 @@ config AVR32
select GENERIC_CLOCKEVENTS
select HAVE_MOD_ARCH_SPECIFIC
select MODULES_USE_ELF_RELA
- select GENERIC_KERNEL_THREAD
- select GENERIC_KERNEL_EXECVE
help
AVR32 is a high-performance 32-bit RISC microprocessor core,
designed for cost-sensitive embedded applications, with particular