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| author | Etienne Carriere <etienne.carriere@foss.st.com> | 2023-07-10 18:05:15 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2023-07-11 11:06:21 +0300 |
| commit | 5060e27012f7e0044ae838de59a46f563c54fb84 (patch) | |
| tree | c266e6aa074c087e54586a4abbffde35894d4cfd /arch/arm | |
| parent | 518272af37b218161dc321e5a11316fc72422f9c (diff) | |
| download | linux-5060e27012f7e0044ae838de59a46f563c54fb84.tar.xz | |
ARM: dts: stm32: leverage OP-TEE ASync notif on STM32MP13x Soc family
Enables use of GIC PPI#15 for OP-TEE asynchronous notifications
on stm32mp13 platforms.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp131.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index d23bbc3639df..672f3b7735a2 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -33,6 +33,8 @@ optee { method = "smc"; compatible = "linaro,optee-tz"; + interrupt-parent = <&intc>; + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; scmi: scmi { |