diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2015-12-03 01:21:49 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2015-12-07 09:13:01 +0300 |
| commit | eaa870b3055384092d8fc075bca3a3a819f73c43 (patch) | |
| tree | 1f2ba041781725ce52faae2578fcc1d25943e38b /arch/arm | |
| parent | d74f61fee39d5896913d268b60884b13b43edee7 (diff) | |
| download | linux-eaa870b3055384092d8fc075bca3a3a819f73c43.tar.xz | |
ARM: shmobile: r8a7791: add EtherAVB clock
Add the EtherAVB clock to the R8A7791 device tree.
Based on the commit 63d2d750c902 ("ARM: shmobile: r8a7790: add EtherAVB
clocks").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 12b2b0f95806..4b3132d9807f 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1329,16 +1329,18 @@ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>, - <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; + <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>, + <&zs_clk>; #clock-cells = <1>; clock-indices = < R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 - R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 + R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER + R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 >; clock-output-names = - "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether", - "sata1", "sata0"; + "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", + "etheravb", "ether", "sata1", "sata0"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |