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author | Dan Williams <dan.j.williams@intel.com> | 2009-09-09 04:42:51 +0400 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-09 04:42:51 +0400 |
commit | 138f4c359d23d2ec38d18bd70dd9613ae515fe93 (patch) | |
tree | ad7fafba6eac74d9d92ade839a65171466d67a70 /arch/arm | |
parent | 0403e3827788d878163f9ef0541b748b0f88ca5d (diff) | |
download | linux-138f4c359d23d2ec38d18bd70dd9613ae515fe93.tar.xz |
dmaengine, async_tx: add a "no channel switch" allocator
Channel switching is problematic for some dmaengine drivers as the
architecture precludes separating the ->prep from ->submit. In these
cases the driver can select ASYNC_TX_DISABLE_CHANNEL_SWITCH to modify
the async_tx allocator to only return channels that support all of the
required asynchronous operations.
For example MD_RAID456=y selects support for asynchronous xor, xor
validate, pq, pq validate, and memcpy. When
ASYNC_TX_DISABLE_CHANNEL_SWITCH=y any channel with all these
capabilities is marked DMA_ASYNC_TX allowing async_tx_find_channel() to
quickly locate compatible channels with the guarantee that dependency
chains will remain on one channel. When
ASYNC_TX_DISABLE_CHANNEL_SWITCH=n async_tx_find_channel() may select
channels that lead to operation chains that need to cross channel
boundaries using the async_tx channel switch capability.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions