diff options
| author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2014-11-10 23:56:42 +0300 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-11-17 23:53:57 +0300 |
| commit | 1ca8bf6f7ba581d8b47144ff5a558e17fba3190d (patch) | |
| tree | 3fe49a77a31d7aabfc23835794c6954b4bbb129e /arch/arm | |
| parent | 09415fa2c58b61ac766816e914ef5872011b4861 (diff) | |
| download | linux-1ca8bf6f7ba581d8b47144ff5a558e17fba3190d.tar.xz | |
ARM: 8195/1: vfp: Bounce undefined instructions in vectored mode
Certain ARM CPU implementations (e.g. Cortex-A15) may not raise a
floating- point exception whenever deprecated short-vector VFP
instructions are executed. Instead these instructions are treated
as UNALLOCATED. Change the VFP exception handling code to emulate
short-vector instructions even if FPEXC exception bits are not
set.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/vfp/vfphw.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index cda654cbf2c2..f74a8f7e5f84 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -197,6 +197,12 @@ look_for_VFP_exceptions: tst r5, #FPSCR_IXE bne process_exception + tst r5, #FPSCR_LENGTH_MASK + beq skip + orr r1, r1, #FPEXC_DEX + b process_exception +skip: + @ Fall into hand on to next handler - appropriate coproc instr @ not recognised by VFP |