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| author | Olof Johansson <olof@lixom.net> | 2015-08-18 23:33:48 +0300 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-08-18 23:33:48 +0300 |
| commit | 62060a3548c5ea038b4ade518cce92be32a6718d (patch) | |
| tree | 5c43e721ce0c0ab53cd0d3b237d15dc8ded51a0a /arch/arm | |
| parent | 582271a3d0c8eed65d8716cf8dba6fa04e9bfc85 (diff) | |
| parent | 8cbd4c2f6a996f6cf5dfdf8775d331606cff95bd (diff) | |
| download | linux-62060a3548c5ea038b4ade518cce92be32a6718d.tar.xz | |
Merge tag 'omap-for-v4.3/dt-pt4-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Fix up bogus RTC compatible change for am4372 and add missing
DPLL for am4372 cpsw Ethernet driver. Also add ARM global and
local timers for am4372.
* tag 'omap-for-v4.3/dt-pt4-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: boot: dts: am4372: add ARM timers and SCU nodes
ARM: dts: AM4372: Add the am4372-rtc compatible string
ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock
ARM: dts: AM437X: add dpll_clksel_mac_clk node
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 31 | ||||
| -rw-r--r-- | arch/arm/boot/dts/am43xx-clocks.dtsi | 9 |
2 files changed, 37 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 65c43346f20b..ee3a492b11c6 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -64,6 +64,27 @@ interrupt-parent = <&gic>; }; + scu: scu@48240000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x48240000 0x100>; + }; + + global_timer: timer@48240200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x48240200 0x100>; + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + clocks = <&dpll_mpu_m2_ck>; + }; + + local_timer: timer@48240600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x48240600 0x100>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + clocks = <&dpll_mpu_m2_ck>; + }; + l2-cache-controller@48242000 { compatible = "arm,pl310-cache"; reg = <0x48242000 0x1000>; @@ -330,7 +351,8 @@ }; rtc: rtc@44e3e000 { - compatible = "ti,am3352-rtc", "ti,da830-rtc"; + compatible = "ti,am4372-rtc", "ti,am3352-rtc", + "ti,da830-rtc"; reg = <0x44e3e000 0x1000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; @@ -549,8 +571,11 @@ #address-cells = <1>; #size-cells = <1>; ti,hwmods = "cpgmac0"; - clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; - clock-names = "fck", "cpts"; + clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, + <&dpll_clksel_mac_clk>; + clock-names = "fck", "cpts", "50mclk"; + assigned-clocks = <&dpll_clksel_mac_clk>; + assigned-clock-rates = <50000000>; status = "disabled"; cpdma_channels = <8>; ale_entries = <1024>; diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi index d0c0dfa4ec48..cc88728d751d 100644 --- a/arch/arm/boot/dts/am43xx-clocks.dtsi +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi @@ -486,6 +486,15 @@ reg = <0x4238>; }; + dpll_clksel_mac_clk: dpll_clksel_mac_clk { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&dpll_core_m5_ck>; + reg = <0x4234>; + ti,bit-shift = <2>; + ti,dividers = <2>, <5>; + }; + clk_32k_mosc_ck: clk_32k_mosc_ck { #clock-cells = <0>; compatible = "fixed-clock"; |