diff options
| author | Huang Shijie <b32955@freescale.com> | 2013-05-28 10:20:08 +0400 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 12:04:29 +0400 |
| commit | 72eb4cca7844c600f2e839c2e27a16c1eaa213f9 (patch) | |
| tree | 993cac83fd7407668deb27c58a9d76f4b4dd47da /arch/arm | |
| parent | 85bf6d4e4b100efda8169f6f98fd65d0029c7813 (diff) | |
| download | linux-72eb4cca7844c600f2e839c2e27a16c1eaa213f9.tar.xz | |
ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.
In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.
The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-sabreauto.dts | 9 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6q-sabreauto.dts | 9 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 |
3 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6dl-sabreauto.dts b/arch/arm/boot/dts/imx6dl-sabreauto.dts index 60f3038137dd..95da71185a4a 100644 --- a/arch/arm/boot/dts/imx6dl-sabreauto.dts +++ b/arch/arm/boot/dts/imx6dl-sabreauto.dts @@ -25,7 +25,14 @@ fsl,pins = < MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 MX6DL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 - MX6DL_PAD_EIM_D19__GPIO3_IO19 0x80000000 + >; + }; + }; + + ecspi1 { + pinctrl_ecspi1_sabreauto: ecspi1-sabreauto { + fsl,pins = < + MX6DL_PAD_EIM_D19__GPIO3_IO19 0x80000000 >; }; }; diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts index 9fb3e998f834..09a75807bc6d 100644 --- a/arch/arm/boot/dts/imx6q-sabreauto.dts +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts @@ -29,7 +29,14 @@ fsl,pins = < MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 MX6Q_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 - MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 + >; + }; + }; + + ecspi1 { + pinctrl_ecspi1_sabreauto: ecspi1-sabreauto { + fsl,pins = < + MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 >; }; }; diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index d6baa51dc83c..a4466e6ebe33 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -20,7 +20,7 @@ fsl,spi-num-chipselects = <1>; cs-gpios = <&gpio3 19 0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1_1>; + pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>; status = "disabled"; /* pin conflict with WEIM NOR */ flash: m25p80@0 { |