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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2023-01-24 11:49:50 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-03-10 11:32:44 +0300
commit16b6a0e91fd37513a8744796b9a75bd1e7353c2b (patch)
treea3f2a1d0d3f2f1086176ae5b067fb27f62e97335 /arch/arm64
parentc051e3c59b454515ef36a37200ddd216b3892ddb (diff)
downloadlinux-16b6a0e91fd37513a8744796b9a75bd1e7353c2b.tar.xz
arm64: dts: qcom: sm8450: drop incorrect cells from serial
[ Upstream commit 60d2da2c916956535cf37b7bf1ae8fefbf432e55 ] The serial/UART device node does not have children with unit addresses, so address/size cells are not correct. Fixes: f5837418479a ("arm64: dts: qcom: sm8450: add uart20 node") Fixes: 5188049c9b36 ("arm64: dts: qcom: Add base SM8450 DTSI") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230124084951.38195-3-krzysztof.kozlowski@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8450.dtsi4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 32a37c878a34..df0d888ffc00 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -991,8 +991,6 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart20_default>;
interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
status = "disabled";
};
@@ -1387,8 +1385,6 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
status = "disabled";
};
};