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| author | Mark Rutland <mark.rutland@arm.com> | 2018-04-12 14:11:13 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-04-20 09:20:44 +0300 |
| commit | 4732001f7721d89d3dc921d5f4c8208405cb88c1 (patch) | |
| tree | 4b348c03f578e9e72220d296f9723a070b4ccde1 /arch/arm64/mm/context.c | |
| parent | 20bcfe09d404df14c2a3b0e3fa3ce56326bd8ced (diff) | |
| download | linux-4732001f7721d89d3dc921d5f4c8208405cb88c1.tar.xz | |
arm64: Add skeleton to harden the branch predictor against aliasing attacks
From: Will Deacon <will.deacon@arm.com>
commit 0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0 upstream.
Aliasing attacks against CPU branch predictors can allow an attacker to
redirect speculative control flow on some CPUs and potentially divulge
information from one context to another.
This patch adds initial skeleton code behind a new Kconfig option to
enable implementation-specific mitigations against these attacks for
CPUs that are affected.
Co-developed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
[v4.9: copy bp hardening cb via text mapping]
Signed-off-by: Mark Rutland <mark.rutland@arm.com> [v4.9 backport]
Tested-by: Greg Hackmann <ghackmann@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm64/mm/context.c')
| -rw-r--r-- | arch/arm64/mm/context.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index b9b087564bac..accf7ead3945 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -240,6 +240,8 @@ asmlinkage void post_ttbr_update_workaround(void) "ic iallu; dsb nsh; isb", ARM64_WORKAROUND_CAVIUM_27456, CONFIG_CAVIUM_ERRATUM_27456)); + + arm64_apply_bp_hardening(); } static int asids_init(void) |