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author | Will Deacon <will.deacon@arm.com> | 2017-03-10 23:32:25 +0300 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-03-20 19:25:45 +0300 |
commit | 87da236ebc711644dcff2339ee5b854f1abf1fca (patch) | |
tree | 73da290dd0092c7b537ee5c77476bd9d216bcf53 /arch/arm64/include/uapi | |
parent | dda288d7e4f605632dc6e19c69063f1725056208 (diff) | |
download | linux-87da236ebc711644dcff2339ee5b854f1abf1fca.tar.xz |
arm64: KVM: Add support for VPIPT I-caches
A VPIPT I-cache has two main properties:
1. Lines allocated into the cache are tagged by VMID and a lookup can
only hit lines that were allocated with the current VMID.
2. I-cache invalidation from EL1/0 only invalidates lines that match the
current VMID of the CPU doing the invalidation.
This can cause issues with non-VHE configurations, where the host runs
at EL1 and wants to invalidate I-cache entries for a guest running with
a different VMID. VHE is not affected, because the host runs at EL2 and
I-cache invalidation applies as expected.
This patch solves the problem by invalidating the I-cache when unmapping
a page at stage 2 on a system with a VPIPT I-cache but not running with
VHE enabled. Hopefully this is an obscure enough configuration that the
overhead isn't anything to worry about, although it does mean that the
by-range I-cache invalidation currently performed when mapping at stage
2 can be elided on such systems, because the I-cache will be clean for
the guest VMID following a rollover event.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/uapi')
0 files changed, 0 insertions, 0 deletions