summaryrefslogtreecommitdiff
path: root/arch/arm64/include/asm
diff options
context:
space:
mode:
authorKristina Martsenko <kristina.martsenko@arm.com>2018-01-15 18:23:48 +0300
committerCatalin Marinas <catalin.marinas@arm.com>2018-01-15 21:20:04 +0300
commit6a205420758af5625429a2e77a2654abbf59ac09 (patch)
tree56c23e65c42f5fdcf7d548bb85f5099a127aaf8b /arch/arm64/include/asm
parent071929dbdd865f779a89ba3f1e06ba8d17dd3743 (diff)
downloadlinux-6a205420758af5625429a2e77a2654abbf59ac09.tar.xz
arm64: fix ID map extension to 52 bits
Commit fa2a8445b1d3 added support for extending the ID map to 52 bits, but accidentally dropped a required change to __cpu_uses_extended_idmap. As a result, the kernel fails to boot when VA_BITS = 48 and the ID map text is in 52-bit physical memory, because we reduce TCR.T0SZ to cover the ID map, but then never set it back to VA_BITS. Add back the change, and also clean up some double parentheses. Fixes: fa2a8445b1d3 ("arm64: allow ID map to be extended to 52 bits") Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm')
-rw-r--r--arch/arm64/include/asm/mmu_context.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index 8f80fcb49252..5aee19905556 100644
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -72,8 +72,7 @@ extern u64 idmap_ptrs_per_pgd;
static inline bool __cpu_uses_extended_idmap(void)
{
- return (!IS_ENABLED(CONFIG_ARM64_VA_BITS_48) &&
- unlikely(idmap_t0sz != TCR_T0SZ(VA_BITS)));
+ return unlikely(idmap_t0sz != TCR_T0SZ(VA_BITS));
}
/*
@@ -82,7 +81,7 @@ static inline bool __cpu_uses_extended_idmap(void)
*/
static inline bool __cpu_uses_extended_idmap_level(void)
{
- return ARM64_HW_PGTABLE_LEVELS((64 - idmap_t0sz)) > CONFIG_PGTABLE_LEVELS;
+ return ARM64_HW_PGTABLE_LEVELS(64 - idmap_t0sz) > CONFIG_PGTABLE_LEVELS;
}
/*