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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-12 19:49:02 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-12 19:49:02 +0400
commit97ebe8f55ae99059c0ad3d3be5c0417647f5e3e0 (patch)
treefa87910a23cf2ba0f245e49c055fa7d646fce830 /arch/arm64/include/asm/fpsimdmacros.h
parentd07e43d70eef15a44a2c328a913d8d633a90e088 (diff)
parentd19766ec52218007d45888860dd40a24bb7f6651 (diff)
downloadlinux-97ebe8f55ae99059c0ad3d3be5c0417647f5e3e0.tar.xz
Merge tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64
Pull ARM64 updates from Catalin Marinas: - Generic execve, kernel_thread, fork/vfork/clone. - Preparatory patches for KVM support (initialising EL2 mode for later installing KVM support, hypervisor stub). - Signal handling corner case fix (alternative signal stack set up for a SEGV handler, which is raised in response to RLIMIT_STACK being reached). - Sub-nanosecond timer error fix. * tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: (30 commits) arm64: Update the MAINTAINERS entry arm64: compat for clock_adjtime(2) is miswired arm64: move FP-SIMD save/restore code to a macro arm64: hyp: initialize vttbr_el2 to zero arm64: add hypervisor stub arm64: record boot mode when entering the kernel arm64: move vector entry macro to assembler.h arm64: add AArch32 execution modes to ptrace.h arm64: expand register mapping between AArch32 and AArch64 arm64: generic timer: use virtual counter instead of physical at EL0 arm64: vdso: defer shifting of nanosecond component of timespec arm64: vdso: rework __do_get_tspec register allocation and return shift arm64: vdso: check sequence counter even for coarse realtime operations arm64: vdso: fix clocksource mask when extracting bottom 56 bits ARM64: Remove incorrect Kconfig symbol HAVE_SPARSE_IRQ Documentation: Fixes a word in Documentation/arm64/memory.txt arm64: Make !dirty ptes read-only arm64: Convert empty flush_cache_{mm,page} functions to static inline arm64: signal: let the compiler inline compat_get_sigframe arm64: signal: return struct rt_sigframe from get_sigframe ... Conflicts: arch/arm64/include/asm/unistd32.h
Diffstat (limited to 'arch/arm64/include/asm/fpsimdmacros.h')
-rw-r--r--arch/arm64/include/asm/fpsimdmacros.h64
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h
new file mode 100644
index 000000000000..bbec599c96bd
--- /dev/null
+++ b/arch/arm64/include/asm/fpsimdmacros.h
@@ -0,0 +1,64 @@
+/*
+ * FP/SIMD state saving and restoring macros
+ *
+ * Copyright (C) 2012 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+.macro fpsimd_save state, tmpnr
+ stp q0, q1, [\state, #16 * 0]
+ stp q2, q3, [\state, #16 * 2]
+ stp q4, q5, [\state, #16 * 4]
+ stp q6, q7, [\state, #16 * 6]
+ stp q8, q9, [\state, #16 * 8]
+ stp q10, q11, [\state, #16 * 10]
+ stp q12, q13, [\state, #16 * 12]
+ stp q14, q15, [\state, #16 * 14]
+ stp q16, q17, [\state, #16 * 16]
+ stp q18, q19, [\state, #16 * 18]
+ stp q20, q21, [\state, #16 * 20]
+ stp q22, q23, [\state, #16 * 22]
+ stp q24, q25, [\state, #16 * 24]
+ stp q26, q27, [\state, #16 * 26]
+ stp q28, q29, [\state, #16 * 28]
+ stp q30, q31, [\state, #16 * 30]!
+ mrs x\tmpnr, fpsr
+ str w\tmpnr, [\state, #16 * 2]
+ mrs x\tmpnr, fpcr
+ str w\tmpnr, [\state, #16 * 2 + 4]
+.endm
+
+.macro fpsimd_restore state, tmpnr
+ ldp q0, q1, [\state, #16 * 0]
+ ldp q2, q3, [\state, #16 * 2]
+ ldp q4, q5, [\state, #16 * 4]
+ ldp q6, q7, [\state, #16 * 6]
+ ldp q8, q9, [\state, #16 * 8]
+ ldp q10, q11, [\state, #16 * 10]
+ ldp q12, q13, [\state, #16 * 12]
+ ldp q14, q15, [\state, #16 * 14]
+ ldp q16, q17, [\state, #16 * 16]
+ ldp q18, q19, [\state, #16 * 18]
+ ldp q20, q21, [\state, #16 * 20]
+ ldp q22, q23, [\state, #16 * 22]
+ ldp q24, q25, [\state, #16 * 24]
+ ldp q26, q27, [\state, #16 * 26]
+ ldp q28, q29, [\state, #16 * 28]
+ ldp q30, q31, [\state, #16 * 30]!
+ ldr w\tmpnr, [\state, #16 * 2]
+ msr fpsr, x\tmpnr
+ ldr w\tmpnr, [\state, #16 * 2 + 4]
+ msr fpcr, x\tmpnr
+.endm