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| author | Will Deacon <will.deacon@arm.com> | 2015-02-12 07:17:37 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-07-27 17:28:51 +0300 |
| commit | 084f903727e1c3a61d6bcdaeeed30bddc6d7f65a (patch) | |
| tree | 614b95211ba1f8b103ed8f8b9de13ee14a5fab8b /arch/arm64/include/asm/cmpxchg.h | |
| parent | 81bb5c6420635dfd058c210bd342c29c95ccd145 (diff) | |
| download | linux-084f903727e1c3a61d6bcdaeeed30bddc6d7f65a.tar.xz | |
arm64: bitops: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our bitops functions so that
LSE atomic instructions are used instead.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cmpxchg.h')
0 files changed, 0 insertions, 0 deletions