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author | Marc Zyngier <marc.zyngier@arm.com> | 2018-01-02 21:19:39 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-02-16 22:22:53 +0300 |
commit | c10e4aa77814063ac459fab673a5a392b7334b42 (patch) | |
tree | ffd6811249594e33c001fa04256a84141888b591 /arch/arm64/include/asm/assembler.h | |
parent | f91f190708b25df0a5675800bcabae13bf2aa882 (diff) | |
download | linux-c10e4aa77814063ac459fab673a5a392b7334b42.tar.xz |
arm64: Move post_ttbr_update_workaround to C code
Commit 95e3de3590e3 upstream.
We will soon need to invoke a CPU-specific function pointer after changing
page tables, so move post_ttbr_update_workaround out into C code to make
this possible.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm64/include/asm/assembler.h')
-rw-r--r-- | arch/arm64/include/asm/assembler.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 6d951a82e656..463619dcadd4 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -481,19 +481,6 @@ alternative_endif mrs \rd, sp_el0 .endm -/* - * Errata workaround post TTBRx_EL1 update. - */ - .macro post_ttbr_update_workaround -#ifdef CONFIG_CAVIUM_ERRATUM_27456 -alternative_if ARM64_WORKAROUND_CAVIUM_27456 - ic iallu - dsb nsh - isb -alternative_else_nop_endif -#endif - .endm - /** * Errata workaround prior to disable MMU. Insert an ISB immediately prior * to executing the MSR that will change SCTLR_ELn[M] from a value of 1 to 0. |