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| author | Rafał Miłecki <rafal@milecki.pl> | 2024-04-05 13:50:30 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-08-03 09:59:24 +0300 |
| commit | a3c80f9326aea4da9be0a59482eb0e4299ca6c82 (patch) | |
| tree | 4f959d73e236067df94db60a42bf68d8bd92a558 /arch/arm64/boot | |
| parent | a07456e3c3d0cd1a865ec5e4b1bf37b547c9a928 (diff) | |
| download | linux-a3c80f9326aea4da9be0a59482eb0e4299ca6c82.tar.xz | |
arm64: dts: mediatek: mt7981: fix code alignment for PWM clocks
[ Upstream commit f80cfe9616b7448eca709a3e87ca57201cd5787c ]
Align "clocks" array entries to start at the same column.
Fixes: cf29427573cc ("arm64: dts: mediatek: Add initial MT7981B and Xiaomi AX3000T")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20240405105030.24559-1-zajec5@gmail.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi index 4feff3d1c5f4..178e1e96c3a4 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -78,10 +78,10 @@ compatible = "mediatek,mt7981-pwm"; reg = <0 0x10048000 0 0x1000>; clocks = <&infracfg CLK_INFRA_PWM_STA>, - <&infracfg CLK_INFRA_PWM_HCK>, - <&infracfg CLK_INFRA_PWM1_CK>, - <&infracfg CLK_INFRA_PWM2_CK>, - <&infracfg CLK_INFRA_PWM3_CK>; + <&infracfg CLK_INFRA_PWM_HCK>, + <&infracfg CLK_INFRA_PWM1_CK>, + <&infracfg CLK_INFRA_PWM2_CK>, + <&infracfg CLK_INFRA_PWM3_CK>; clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; #pwm-cells = <2>; }; |